Hi Stefano,
On Tue, Mar 15, 2016 at 2:10 PM, Akshay Bhat <akshay.b...@timesys.com>
wrote:
Implements the below changes:
- Disable LVDS1 on B450v3/B650v3 boards since the final boards no longer
have connectors for the same. Only LVDS0 hardware connectors are present.
- Implement imx6 EB821 or ERR009219 errata for LVDS clock switch.
This patch was ported from Freescale 3.10.17_1.0.0_ga kernel to u-boot.
- Split the display setup into 2 different functions. One for B850v3 that
does a setup of LVDS and HDMI with clock source for LVDS/IPU_DI set to
video PLL. The other for B450v3/B650v3 that does a setup of LVDS only with
clock source for LVDS/IPU_DI set to USB PLL. This helps us generate
accurate pixel clock required for display connected to LVDS.
Signed-off-by: Akshay Bhat <akshay.b...@timesys.com>
Cc: Stefano Babic <sba...@denx.de>
---
Can this be applied if there are no review comments.
Thanks,
Akshay
_______________________________________________
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
