Optimize DDR timing for good margins to support new Transcend and Apacer DDR4 UDIMM besides current Micron UDIMM.
Verified 1866MT/s and 2133MT/s with following UDIMM on LS2080ARDB. - Micron UDIMM: MTA18ASF1G72AZ-2G1A1Z - Apacer UDIMM: 78.C1GM4.AF10B - Transcend UDIMM: TS1GLH72V1H Signed-off-by: Shengzhou Liu <shengzhou....@nxp.com> --- board/freescale/ls2080ardb/ddr.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/board/freescale/ls2080ardb/ddr.h b/board/freescale/ls2080ardb/ddr.h index bda9d4a..7274778 100644 --- a/board/freescale/ls2080ardb/ddr.h +++ b/board/freescale/ls2080ardb/ddr.h @@ -30,8 +30,8 @@ static const struct board_specific_parameters udimm0[] = { */ {2, 1350, 0, 4, 6, 0x0708090B, 0x0C0D0E09,}, {2, 1666, 0, 4, 8, 0x08090B0D, 0x0E10100C,}, - {2, 1900, 0, 4, 8, 0x090A0C0E, 0x1012120D,}, - {2, 2300, 0, 4, 9, 0x0A0B0C10, 0x1114140E,}, + {2, 1900, 0, 6, 0xA, 0x0B0C0E11, 0x1214140F,}, + {2, 2300, 0, 6, 0xB, 0x0C0D0F12, 0x14161610,}, {} }; -- 2.1.0.27.g96db324 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot