On 02/12/2016 01:39 AM, Rai Harninder wrote: > This patch enable VID support for ls2080ardb platform. > It uses the common VID driver > > Signed-off-by: Rai Harninder <harninder....@nxp.com> > --- > Changes in v3: > - Call adjust_vdd() so that the voltage gets adjusted > during u-boot boot up itself > > Changes in v2 > - Use CONFIG_FSL_LSCH3 instead of CONFIG_LAYERSCAPE > since the latter is defined for other platforms > as well > - Modify patch description > > .../include/asm/arch-fsl-layerscape/immap_lsch3.h | 4 ++++ > board/freescale/common/vid.c | 15 ++++++++++++++- > board/freescale/ls2080ardb/ls2080ardb.c | 8 ++++++++ > include/configs/ls2080ardb.h | 16 ++++++++++++++++ > 4 files changed, 42 insertions(+), 1 deletions(-) > > diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h > b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h > index 91f3ce8..4fd58ee 100644 > --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h > +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h > @@ -146,6 +146,10 @@ struct ccsr_gur { > u8 res_008[0x20-0x8]; > u32 gpporcr1; /* General-purpose POR configuration */ > u32 gpporcr2; /* General-purpose POR configuration 2 */ > +#define FSL_CHASSIS3_DCFG_FUSESR_VID_SHIFT 25 > +#define FSL_CHASSIS3_DCFG_FUSESR_VID_MASK 0x1F > +#define FSL_CHASSIS3_DCFG_FUSESR_ALTVID_SHIFT 20 > +#define FSL_CHASSIS3_DCFG_FUSESR_ALTVID_MASK 0x1F > u32 dcfg_fusesr; /* Fuse status register */ > u32 gpporcr3; > u32 gpporcr4; > diff --git a/board/freescale/common/vid.c b/board/freescale/common/vid.c > index 1bd65a8..b037643 100644 > --- a/board/freescale/common/vid.c > +++ b/board/freescale/common/vid.c > @@ -10,6 +10,8 @@ > #include <asm/io.h> > #ifdef CONFIG_LS1043A > #include <asm/arch/immap_lsch2.h> > +#elif defined(CONFIG_FSL_LSCH3) > +#include <asm/arch/immap_lsch3.h> > #else > #include <asm/immap_85xx.h> > #endif > @@ -285,7 +287,7 @@ static int set_voltage(int i2caddress, int vdd) > int adjust_vdd(ulong vdd_override) > { > int re_enable = disable_interrupts(); > -#ifdef CONFIG_LS1043A > +#if defined(CONFIG_LS1043A) || defined(CONFIG_FSL_LSCH3) > struct ccsr_gur *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR); > #else > ccsr_gur_t __iomem *gur = > @@ -362,7 +364,11 @@ int adjust_vdd(ulong vdd_override) > } > > /* get the voltage ID from fuse status register */ > +#ifdef CONFIG_FSL_LSCH3 > + fusesr = in_le32(&gur->dcfg_fusesr); > +#else > fusesr = in_be32(&gur->dcfg_fusesr); > +#endif > /* > * VID is used according to the table below > * --------------------------------------- > @@ -387,6 +393,13 @@ int adjust_vdd(ulong vdd_override) > vid = (fusesr >> FSL_CHASSIS2_DCFG_FUSESR_VID_SHIFT) & > FSL_CHASSIS2_DCFG_FUSESR_VID_MASK; > } > +#elif defined(CONFIG_FSL_LSCH3) > + vid = (fusesr >> FSL_CHASSIS3_DCFG_FUSESR_ALTVID_SHIFT) & > + FSL_CHASSIS3_DCFG_FUSESR_ALTVID_MASK; > + if ((vid == 0) || (vid == FSL_CHASSIS3_DCFG_FUSESR_ALTVID_MASK)) { > + vid = (fusesr >> FSL_CHASSIS3_DCFG_FUSESR_VID_SHIFT) & > + FSL_CHASSIS3_DCFG_FUSESR_VID_MASK; > + } > #else > vid = (fusesr >> FSL_CORENET_DCFG_FUSESR_ALTVID_SHIFT) & > FSL_CORENET_DCFG_FUSESR_ALTVID_MASK; > diff --git a/board/freescale/ls2080ardb/ls2080ardb.c > b/board/freescale/ls2080ardb/ls2080ardb.c > index c63b639..952b8e5 100644 > --- a/board/freescale/ls2080ardb/ls2080ardb.c > +++ b/board/freescale/ls2080ardb/ls2080ardb.c > @@ -122,6 +122,11 @@ int select_i2c_ch_pca9547(u8 ch) > return 0; > } > > +int i2c_multiplexer_select_vid_channel(u8 channel) > +{ > + return select_i2c_ch_pca9547(channel); > +} > + > int config_board_mux(int ctrl_type) > { > u8 reg5; > @@ -184,6 +189,9 @@ int misc_init_r(void) > if (hwconfig("sdhc")) > config_board_mux(MUX_TYPE_SDHC); > > + if (adjust_vdd(0)) > + printf("Warning: Adjusting core voltage failed.\n"); > +
You didn't declare adjust_vdd. This causes warning: implicit declaration of function ‘adjust_vdd’ [-Wimplicit-function-declaration] York _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot