Hi Fabio,
On Fri, Feb 26, 2016 at 03:16:10PM -0300, Fabio Estevam wrote:
>From: Fabio Estevam <fabio.este...@nxp.com>
>
>Add the basic support for Warp7 board.
>
>For more information about this reference design, please visit:
>
>https://www.element14.com/community/docs/DOC-79058/l/warp-7-the-next-generation-wearable-reference-platform
>
>Signed-off-by: Fabio Estevam <fabio.este...@nxp.com>
>---
> arch/arm/cpu/armv7/mx7/Kconfig | 6 ++
> board/warp7/Kconfig | 9 +++
> board/warp7/MAINTAINERS | 6 ++
> board/warp7/Makefile | 6 ++
> board/warp7/imximage.cfg | 95 ++++++++++++++++++++++++++
> board/warp7/warp7.c | 102 ++++++++++++++++++++++++++++
> configs/warp7_defconfig | 12 ++++
> include/configs/warp7.h | 149 +++++++++++++++++++++++++++++++++++++++++
> 8 files changed, 385 insertions(+)
> create mode 100644 board/warp7/Kconfig
> create mode 100644 board/warp7/MAINTAINERS
> create mode 100644 board/warp7/Makefile
> create mode 100644 board/warp7/imximage.cfg
> create mode 100644 board/warp7/warp7.c
> create mode 100644 configs/warp7_defconfig
> create mode 100644 include/configs/warp7.h
>
>diff --git a/arch/arm/cpu/armv7/mx7/Kconfig b/arch/arm/cpu/armv7/mx7/Kconfig
>index 97d6238..58d9bbf 100644
>--- a/arch/arm/cpu/armv7/mx7/Kconfig
>+++ b/arch/arm/cpu/armv7/mx7/Kconfig
>@@ -18,11 +18,17 @@ config TARGET_MX7DSABRESD
> select DM
> select DM_THERMAL
>
>+config TARGET_WARP7
>+ bool "warp7"
>+ select DM
>+ select DM_THERMAL
>+
> endchoice
>
> config SYS_SOC
> default "mx7"
>
> source "board/freescale/mx7dsabresd/Kconfig"
>+source "board/warp7/Kconfig"
>
> endif
>diff --git a/board/warp7/Kconfig b/board/warp7/Kconfig
>new file mode 100644
>index 0000000..61c33fb
>--- /dev/null
>+++ b/board/warp7/Kconfig
>@@ -0,0 +1,9 @@
>+if TARGET_WARP7
>+
>+config SYS_BOARD
>+ default "warp7"
>+
>+config SYS_CONFIG_NAME
>+ default "warp7"
>+
>+endif
>diff --git a/board/warp7/MAINTAINERS b/board/warp7/MAINTAINERS
>new file mode 100644
>index 0000000..1d3ee29
>--- /dev/null
>+++ b/board/warp7/MAINTAINERS
>@@ -0,0 +1,6 @@
>+WARP7 BOARD
>+M: Fabio Estevam <fabio.este...@nxp.com>
>+S: Maintained
>+F: board/warp7/
>+F: include/configs/warp7.h
>+F: configs/warp7_defconfig
>diff --git a/board/warp7/Makefile b/board/warp7/Makefile
>new file mode 100644
>index 0000000..f39d1d8
>--- /dev/null
>+++ b/board/warp7/Makefile
>@@ -0,0 +1,6 @@
>+# (C) Copyright 2016 NXP Semiconductors
>+#
>+# SPDX-License-Identifier: GPL-2.0+
>+#
>+
>+obj-y := warp7.o
>diff --git a/board/warp7/imximage.cfg b/board/warp7/imximage.cfg
>new file mode 100644
>index 0000000..e7b6d30
>--- /dev/null
>+++ b/board/warp7/imximage.cfg
>@@ -0,0 +1,95 @@
>+/*
>+ * Copyright (C) 2016 NXP Semiconductors
>+ *
>+ * SPDX-License-Identifier: GPL-2.0
>+ *
>+ * Refer docs/README.imxmage for more details about how-to configure
>+ * and create imximage boot image
>+ *
>+ * The syntax is taken as close as possible with the kwbimage
>+ */
>+
>+#define __ASSEMBLY__
>+#include <config.h>
>+
>+IMAGE_VERSION 2
>+BOOT_FROM sd
>+
>+/*
>+ * Device Configuration Data (DCD)
>+ *
>+ * Each entry must have the format:
>+ * Addr-type Address Value
>+ *
>+ * where:
>+ * Addr-type register length (1,2 or 4 bytes)
>+ * Address absolute address of the register
>+ * value value to be stored in the register
>+ */
>+
>+DATA 4 0x30340004 0x4F400005
>+
>+DATA 4 0x30391000 0x00000002
>+DATA 4 0x307a0000 0x03040008
>+DATA 4 0x307a0064 0x00200038
>+DATA 4 0x307a0490 0x00000001
>+DATA 4 0x307a00d0 0x00350001
>+DATA 4 0x307a00dc 0x00c3000a
>+DATA 4 0x307a00e0 0x00010000
>+DATA 4 0x307a00e4 0x00110006
>+DATA 4 0x307a00f4 0x0000033f
>+DATA 4 0x307a0100 0x0a0e110b
>+DATA 4 0x307a0104 0x00020211
>+DATA 4 0x307a0108 0x03060708
>+DATA 4 0x307a010c 0x00a0500c
>+DATA 4 0x307a0110 0x05020307
>+DATA 4 0x307a0114 0x02020404
>+DATA 4 0x307a0118 0x02020003
>+DATA 4 0x307a011c 0x00000202
>+DATA 4 0x307a0120 0x00000202
>+
>+DATA 4 0x307a0180 0x00600018
>+DATA 4 0x307a0184 0x00e00100
>+DATA 4 0x307a0190 0x02098205
>+DATA 4 0x307a0194 0x00060303
>+DATA 4 0x307a01a0 0x80400003
>+DATA 4 0x307a01a4 0x00100020
>+DATA 4 0x307a01a8 0x80100004
>+
>+DATA 4 0x307a0200 0x00000015
>+DATA 4 0x307a0204 0x00161616
>+DATA 4 0x307a0210 0x00000f0f
>+DATA 4 0x307a0214 0x04040404
>+DATA 4 0x307a0218 0x0f0f0404
>+
>+DATA 4 0x307a0240 0x06000600
>+DATA 4 0x307a0244 0x00000000
>+DATA 4 0x30391000 0x00000000
>+DATA 4 0x30790000 0x17421e40
>+DATA 4 0x30790004 0x10210100
>+DATA 4 0x30790008 0x00010000
>+DATA 4 0x30790010 0x0007080c
>+DATA 4 0x307900b0 0x1010007e
>+
>+DATA 4 0x3079001C 0x01010000
>+DATA 4 0x3079009c 0x00000d6e
>+
>+DATA 4 0x30790030 0x06060606
>+DATA 4 0x30790020 0x0a0a0a0a
>+DATA 4 0x30790050 0x01000008
>+DATA 4 0x30790050 0x00000008
>+DATA 4 0x30790018 0x0000000f
>+DATA 4 0x307900c0 0x0e487304
>+DATA 4 0x307900c0 0x0e4c7304
>+DATA 4 0x307900c0 0x0e4c7306
>+DATA 4 0x307900c0 0x0e4c7304
>+
>+CHECK_BITS_SET 4 0x307900c4 0x1
>+
>+DATA 4 0x307900c0 0x0e487304
>+
>+DATA 4 0x30384130 0x00000000
>+DATA 4 0x30340020 0x00000178
>+DATA 4 0x30384130 0x00000002
>+
>+CHECK_BITS_SET 4 0x307a0004 0x1
>diff --git a/board/warp7/warp7.c b/board/warp7/warp7.c
>new file mode 100644
>index 0000000..8c5bf9a
>--- /dev/null
>+++ b/board/warp7/warp7.c
>@@ -0,0 +1,102 @@
>+/*
>+ * Copyright (C) 2016 NXP Semiconductors
>+ * Author: Fabio Estevam <fabio.este...@nxp.com>
>+ *
>+ * SPDX-License-Identifier: GPL-2.0+
>+ */
>+
>+#include <asm/arch/clock.h>
>+#include <asm/arch/imx-regs.h>
>+#include <asm/arch/mx7-pins.h>
>+#include <asm/arch/sys_proto.h>
>+#include <asm/gpio.h>
>+#include <asm/imx-common/iomux-v3.h>
>+#include <asm/io.h>
>+#include <common.h>
>+#include <fsl_esdhc.h>
>+#include <mmc.h>
>+#include <asm/arch/crm_regs.h>
>+#include <usb.h>
>+
>+DECLARE_GLOBAL_DATA_PTR;
>+
>+#define UART_PAD_CTRL (PAD_CTL_DSE_3P3V_49OHM | PAD_CTL_PUS_PU100KOHM | \
>+ PAD_CTL_HYS)
>+#define USDHC_PAD_CTRL (PAD_CTL_DSE_3P3V_32OHM | PAD_CTL_SRE_SLOW | \
>+ PAD_CTL_HYS | PAD_CTL_PUE | PAD_CTL_PUS_PU47KOHM)
>+
>+int dram_init(void)
>+{
>+ gd->ram_size = PHYS_SDRAM_SIZE;
>+
>+ return 0;
>+}
>+
>+static iomux_v3_cfg_t const uart1_pads[] = {
>+ MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
>+ MX7D_PAD_UART1_RX_DATA__UART1_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
>+};
>+
>+static iomux_v3_cfg_t const usdhc3_pads[] = {
>+ MX7D_PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
>+ MX7D_PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
>+ MX7D_PAD_SD3_DATA0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
>+ MX7D_PAD_SD3_DATA1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
>+ MX7D_PAD_SD3_DATA2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
>+ MX7D_PAD_SD3_DATA3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
>+ MX7D_PAD_SD3_DATA4__SD3_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
>+ MX7D_PAD_SD3_DATA5__SD3_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
>+ MX7D_PAD_SD3_DATA6__SD3_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
>+ MX7D_PAD_SD3_DATA7__SD3_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
>+ MX7D_PAD_SD3_RESET_B__SD3_RESET_B | MUX_PAD_CTRL(USDHC_PAD_CTRL),
Will this pin be used? I did not see code to use this.
>+};
>+
>+static void setup_iomux_uart(void)
>+{
>+ imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
>+};
>+
>+static struct fsl_esdhc_cfg usdhc_cfg[1] = {
>+ {USDHC3_BASE_ADDR},
>+};
>+
>+int board_mmc_getcd(struct mmc *mmc)
>+{
>+ /* Assume uSDHC3 emmc is always present */
>+ return 1;
>+}
>+
>+int board_mmc_init(bd_t *bis)
>+{
>+ imx_iomux_v3_setup_multiple_pads(usdhc3_pads, ARRAY_SIZE(usdhc3_pads));
>+ usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
>+
>+ return fsl_esdhc_initialize(bis, &usdhc_cfg[0]);
>+}
>+
>+int board_early_init_f(void)
>+{
>+ setup_iomux_uart();
>+
>+ return 0;
>+}
>+
>+int board_init(void)
>+{
>+ /* address of boot parameters */
>+ gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
>+
>+ return 0;
>+}
>+
>+int checkboard(void)
>+{
>+ puts("Board: WARP7\n");
>+
>+ return 0;
>+}
>+
>+int board_usb_phy_mode(int port)
>+{
>+ return USB_INIT_DEVICE;
>+}
>diff --git a/configs/warp7_defconfig b/configs/warp7_defconfig
>new file mode 100644
>index 0000000..6f911e7
>--- /dev/null
>+++ b/configs/warp7_defconfig
>@@ -0,0 +1,12 @@
>+CONFIG_ARM=y
>+CONFIG_ARCH_MX7=y
>+CONFIG_TARGET_WARP7=y
>+CONFIG_IMX_RDC=y
>+CONFIG_IMX_BOOTAUX=y
default enable RDC and BOOTAUX?
>+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/warp7/imximage.cfg,MX7D"
I just an idea that we move the MX7D to Kconfig entry using "SELECT MX7D",
how do you think?
>+# CONFIG_CMD_BOOTD is not set
>+# CONFIG_CMD_IMI is not set
>+# CONFIG_CMD_IMLS is not set
>+# CONFIG_CMD_XIMG is not set
>+CONFIG_CMD_GPIO=y
>+# CONFIG_CMD_SETEXPR is not set
>diff --git a/include/configs/warp7.h b/include/configs/warp7.h
>new file mode 100644
>index 0000000..97c8bc8
>--- /dev/null
>+++ b/include/configs/warp7.h
>@@ -0,0 +1,149 @@
>+/*
>+ * Copyright (C) 2016 NXP Semiconductors
>+ *
>+ * Configuration settings for the i.MX7S Warp board.
>+ *
>+ * SPDX-License-Identifier: GPL-2.0+
>+ */
>+
>+#ifndef __WARP7_CONFIG_H
>+#define __WARP7_CONFIG_H
>+
>+#define CONFIG_BOOTDELAY 1
>+#include "mx7_common.h"
>+
>+#define PHYS_SDRAM_SIZE SZ_512M
>+
>+#define CONFIG_BOARD_EARLY_INIT_F
>+
>+/* MMC Config*/
>+#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC3_BASE_ADDR
>+#define CONFIG_SUPPORT_EMMC_BOOT
>+#define CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE
>+#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
>+
>+#define CONFIG_DFU_ENV_SETTINGS \
>+ "dfu_alt_info=image raw 0 0x800000;"\
>+ "u-boot raw 0 0x4000;"\
>+ "bootimg part 0 1;"\
>+ "rootfs part 0 2\0" \
>+
>+#define CONFIG_EXTRA_ENV_SETTINGS \
>+ CONFIG_DFU_ENV_SETTINGS \
>+ "script=boot.scr\0" \
>+ "image=zImage\0" \
>+ "console=ttymxc0\0" \
>+ "fdt_high=0xffffffff\0" \
>+ "initrd_high=0xffffffff\0" \
>+ "fdt_file=imx7d-warp.dtb\0" \
>+ "fdt_addr=0x83000000\0" \
>+ "boot_fdt=try\0" \
>+ "ip_dyn=yes\0" \
>+ "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
>+ "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
>+ "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
>+ "mmcargs=setenv bootargs console=${console},${baudrate} " \
>+ "root=${mmcroot}\0" \
>+ "loadbootscript=" \
>+ "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
>+ "bootscript=echo Running bootscript from mmc ...; " \
>+ "source\0" \
>+ "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
>+ "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
>+ "mmcboot=echo Booting from mmc ...; " \
>+ "run mmcargs; " \
>+ "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
>+ "if run loadfdt; then " \
>+ "bootz ${loadaddr} - ${fdt_addr}; " \
>+ "else " \
>+ "if test ${boot_fdt} = try; then " \
>+ "bootz; " \
>+ "else " \
>+ "echo WARN: Cannot load the DT; " \
>+ "fi; " \
>+ "fi; " \
>+ "else " \
>+ "bootz; " \
>+ "fi;\0" \
>+
>+#define CONFIG_BOOTCOMMAND \
>+ "mmc dev ${mmcdev};" \
>+ "mmc dev ${mmcdev}; if mmc rescan; then " \
>+ "if run loadbootscript; then " \
>+ "run bootscript; " \
>+ "else " \
>+ "if run loadimage; then " \
>+ "run mmcboot; " \
>+ "fi; " \
>+ "fi; " \
>+ "fi"
>+
>+#define CONFIG_CMD_MEMTEST
>+#define CONFIG_SYS_MEMTEST_START 0x80000000
>+#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START +
>0x20000000)
>+
>+#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
>+#define CONFIG_SYS_HZ 1000
>+
>+#define CONFIG_STACKSIZE SZ_128K
>+
>+/* Physical Memory Map */
>+#define CONFIG_NR_DRAM_BANKS 1
>+#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
>+
>+#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
>+#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
>+#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
>+
>+#define CONFIG_SYS_INIT_SP_OFFSET \
>+ (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
>+#define CONFIG_SYS_INIT_SP_ADDR \
>+ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
>+
>+/* FLASH and environment organization */
>+#define CONFIG_SYS_NO_FLASH
>+#define CONFIG_ENV_SIZE SZ_8K
>+#define CONFIG_ENV_IS_IN_MMC
>+
>+#define CONFIG_ENV_OFFSET (8 * SZ_64K)
>+#define CONFIG_SYS_FSL_USDHC_NUM 1
>+
>+#define CONFIG_SYS_MMC_ENV_DEV 0
>+#define CONFIG_SYS_MMC_ENV_PART 0
>+#define CONFIG_MMCROOT "/dev/mmcblk2p2"
>+
>+/* USB Configs */
>+#define CONFIG_CMD_USB
>+#define CONFIG_USB_EHCI
>+#define CONFIG_USB_EHCI_MX7
>+#define CONFIG_USB_STORAGE
>+#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
>+
>+#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
>+#define CONFIG_MXC_USB_FLAGS 0
>+#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 /* Only OTG1 port enabled */
>+
>+#define CONFIG_IMX_THERMAL
>+
>+#define CONFIG_CI_UDC
>+#define CONFIG_USBD_HS
>+#define CONFIG_USB_GADGET_DUALSPEED
>+
>+#define CONFIG_USB_GADGET
>+#define CONFIG_CMD_USB_MASS_STORAGE
>+#define CONFIG_USB_FUNCTION_MASS_STORAGE
>+#define CONFIG_USB_GADGET_DOWNLOAD
>+#define CONFIG_USB_GADGET_VBUS_DRAW 2
>+
>+#define CONFIG_G_DNL_VENDOR_NUM 0x0525
>+#define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5
>+#define CONFIG_G_DNL_MANUFACTURER "FSL"
>+
>+/* USB Device Firmware Update support */
>+#define CONFIG_CMD_DFU
>+#define CONFIG_USB_FUNCTION_DFU
>+#define CONFIG_DFU_MMC
>+#define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_16M
>+#define DFU_DEFAULT_POLL_TIMEOUT 300
>+
>+#endif
Reviewed-by: Peng Fan <peng....@nxp.com>
Regards,
Peng.
>--
>1.9.1
>
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