The UniPhier SoC family has not supported ARMv8 yet, but these would
cause warnings if they were compiled with a 64bit compiler. Before
adding the ARMv8 support really, fix them now.
Because UniPhier SoCs do not support Large Physical Address Extension,
casting "phys_addr_t" into "unsigned long" would carry the address
as is.
Signed-off-by: Masahiro Yamada <yamada.masah...@socionext.com>
---
arch/arm/mach-uniphier/dram_init.c | 5 +++--
arch/arm/mach-uniphier/micro-support-card.c | 3 ++-
arch/arm/mach-uniphier/sg-regs.h | 2 +-
3 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-uniphier/dram_init.c
b/arch/arm/mach-uniphier/dram_init.c
index 32cc448..cffdfc9 100644
--- a/arch/arm/mach-uniphier/dram_init.c
+++ b/arch/arm/mach-uniphier/dram_init.c
@@ -32,7 +32,7 @@ int dram_init(void)
gd->ram_size = fdt32_to_cpu(*(val + 1));
- debug("DRAM size = %08lx\n", gd->ram_size);
+ debug("DRAM size = %08lx\n", (unsigned long)gd->ram_size);
return 0;
}
@@ -54,6 +54,7 @@ void dram_init_banksize(void)
gd->bd->bi_dram[i].size = fdt32_to_cpu(*val++);
debug("DRAM bank %d: start = %08lx, size = %08lx\n",
- i, gd->bd->bi_dram[i].start, gd->bd->bi_dram[i].size);
+ i, (unsigned long)gd->bd->bi_dram[i].start,
+ (unsigned long)gd->bd->bi_dram[i].size);
}
}
diff --git a/arch/arm/mach-uniphier/micro-support-card.c
b/arch/arm/mach-uniphier/micro-support-card.c
index f777ac1..f7a37e3 100644
--- a/arch/arm/mach-uniphier/micro-support-card.c
+++ b/arch/arm/mach-uniphier/micro-support-card.c
@@ -142,7 +142,8 @@ static void detect_num_flash_banks(void)
memory_bank;
debug("flash bank found: base = 0x%lx, size = 0x%lx\n",
- memory_bank->base, memory_bank->size);
+ (unsigned long)memory_bank->base,
+ (unsigned long)memory_bank->size);
cfi_flash_num_flash_banks++;
}
}
diff --git a/arch/arm/mach-uniphier/sg-regs.h b/arch/arm/mach-uniphier/sg-regs.h
index 678d437..3a535c7 100644
--- a/arch/arm/mach-uniphier/sg-regs.h
+++ b/arch/arm/mach-uniphier/sg-regs.h
@@ -105,7 +105,7 @@ static inline void sg_set_pinsel(unsigned pin, unsigned
muxval,
unsigned mux_bits, unsigned reg_stride)
{
unsigned shift = pin * mux_bits % 32;
- unsigned reg = SG_PINCTRL_BASE + pin * mux_bits / 32 * reg_stride;
+ unsigned long reg = SG_PINCTRL_BASE + pin * mux_bits / 32 * reg_stride;
u32 mask = (1U << mux_bits) - 1;
u32 tmp;
--
1.9.1
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