Hi Marek,

On 11 February 2016 at 13:58, Marek Vasut <ma...@denx.de> wrote:
> On 02/11/2016 09:28 PM, Simon Glass wrote:
>> Hi,
>>
>> On 11 February 2016 at 08:54, Stefan Roese <s...@denx.de> wrote:
>>> On 11.02.2016 16:49, Marek Vasut wrote:
>>>>
>>>> On 02/11/2016 04:45 PM, Stefan Roese wrote:
>>>>>
>>>>> With commit c32a6fd0 [net: Don't call board/cpu_eth_init() with driver
>>>>> model], cpu_eth_init() is not called on SoCFPGA any more. Since this
>>>>> function configures the internal PHY interface to RGMII (via the physel_X
>>>>> bits), its still needed. So lets rename this function and call it in
>>>>> arch_early_init_r().
>>>>>
>>>>> Tested on socfpga_sr1500.
>>>>>
>>>>> Signed-off-by: Stefan Roese <s...@denx.de>
>>>>> Cc: Simon Glass <s...@chromium.org>
>>>>> Cc: Dinh Nguyen <dingu...@opensource.altera.com>
>>>>> Cc: Marek Vasut <ma...@denx.de>
>>>>> ---
>>>>>   arch/arm/mach-socfpga/misc.c | 6 +++++-
>>>>>   1 file changed, 5 insertions(+), 1 deletion(-)
>>>>>
>>>>> diff --git a/arch/arm/mach-socfpga/misc.c b/arch/arm/mach-socfpga/misc.c
>>>>> index 9b43b92..2b1cd4a 100644
>>>>> --- a/arch/arm/mach-socfpga/misc.c
>>>>> +++ b/arch/arm/mach-socfpga/misc.c
>>>>> @@ -104,7 +104,7 @@ static void dwmac_deassert_reset(const unsigned int
>>>>> of_reset_id)
>>>>>         socfpga_per_reset(reset, 0);
>>>>>   }
>>>>
>>>>
>>>> I just sent and applied very similar patch, can you try
>>>> u-boot-socfpga/master and see if it works for you?
>>>
>>>
>>> Done and works just fine. So please feel free to upstream your patch
>>> version.
>>
>> Can this be done in the driver? You have a device tree representation
>> I think. If you are using the compat list in fdtdec.c then it suggests
>> that you need a driver.
>
> Does u-boot DM already have the ability to handle resets of various IP
> blocks on the chip ? I don't think so, so for now I'll opt for fixing
> this breakage.
>

OK I see what you mean. We might need to rename the current
UCLASS_RESET to make room for this.

Regards,
Simon
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