> -----Original Message----- > From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of york sun > Sent: Thursday, February 04, 2016 10:15 PM > To: Harninder Rai <harninder....@nxp.com>; u-boot@lists.denx.de > Subject: Re: [U-Boot] [PATCH] armv8/ls2080ardb: Enable VID support > > Rai, > > On 02/04/2016 06:25 AM, Rai Harninder wrote: > > The fuse status register provides the values from on-chip voltage ID > > efuses programmed at the factory. These values define the voltage > > requirements for the chip. u-boot reads FUSESR and translates the > > values into the appropriate commands to set the voltage output value > > of an external voltage regulator. > > No need to repeat what VID feature is. Instead, please focus on what this > patch does. > > > > > Signed-off-by: Rai Harninder <harninder....@nxp.com> > > --- > > .../include/asm/arch-fsl-layerscape/immap_lsch3.h | 4 ++++ > > board/freescale/common/vid.c | 15 ++++++++++++++- > > board/freescale/ls2080ardb/ls2080ardb.c | 5 +++++ > > include/configs/ls2080ardb.h | 16 ++++++++++++++++ > > 4 files changed, 39 insertions(+), 1 deletions(-) > > > > diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h > > b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h > > index 91f3ce8..4fd58ee 100644 > > --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h > > +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h > > @@ -146,6 +146,10 @@ struct ccsr_gur { > > u8 res_008[0x20-0x8]; > > u32 gpporcr1; /* General-purpose POR configuration */ > > u32 gpporcr2; /* General-purpose POR configuration 2 */ > > +#define FSL_CHASSIS3_DCFG_FUSESR_VID_SHIFT 25 > > +#define FSL_CHASSIS3_DCFG_FUSESR_VID_MASK 0x1F > > +#define FSL_CHASSIS3_DCFG_FUSESR_ALTVID_SHIFT 20 > > +#define FSL_CHASSIS3_DCFG_FUSESR_ALTVID_MASK 0x1F > > u32 dcfg_fusesr; /* Fuse status register */ > > u32 gpporcr3; > > u32 gpporcr4; > > diff --git a/board/freescale/common/vid.c > > b/board/freescale/common/vid.c index 1bd65a8..16ae177 100644 > > --- a/board/freescale/common/vid.c > > +++ b/board/freescale/common/vid.c > > @@ -10,6 +10,8 @@ > > #include <asm/io.h> > > #ifdef CONFIG_LS1043A > > #include <asm/arch/immap_lsch2.h> > > +#elif defined(CONFIG_FSL_LAYERSCAPE) > > +#include <asm/arch/immap_lsch3.h> > > It is not appropriate to use macro CONFIG_FSL_LAYERSCAPE here. It is > defined for both LS1043 and LS2080. >
Oh... Then LS2080 and LS2085 config needs to used. Also need to use LS2088A and LS1088A. LS1043 is Chassis Gen2 and Other are Chassis Gen3 so different address etc. How to avoid adding SoC config for each Chassis Gen3 SoC. We need to define some config used across Gen3 SoCs. --prabhakar _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
