On 12/16/2015 12:53 AM, Shengzhou Liu wrote: > Erratum A-009663 workaround requires to set DDR_INTERVAL[BSTOPRE] to 0 > before setting DDR_SDRAM_CFG[MEM_EN] and set DDR_INTERVAL[BSTOPRE] > to the desired value after DDR initialization has completed. > > When DDR controller is configured to operate in auto-precharge > mode(DDR_INTERVAL[BSTOPRE]=0), this workaround is not needed. > > Signed-off-by: Shengzhou Liu <shengzhou....@freescale.com> > --- > v2: add more comments. > > arch/arm/include/asm/arch-fsl-layerscape/config.h | 3 +++ > arch/arm/include/asm/arch-ls102xa/config.h | 1 + > arch/powerpc/cpu/mpc85xx/cmd_errata.c | 3 +++ > arch/powerpc/include/asm/config_mpc85xx.h | 2 ++ > drivers/ddr/fsl/fsl_ddr_gen4.c | 10 ++++++++++ > include/fsl_ddr_sdram.h | 1 + > 6 files changed, 20 insertions(+)
Applied to u-boot-fsl-qoriq master. Awaiting upstream. Thanks. York _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
