On 26/01/2016 15:01, Ye Li wrote:
> The checking with max frequency supported is not correct, because the temp
> is calculated by max pre and post dividers. We can decrease any divider to
> meet the max frequency limitation. Actually, the calculation below the codes
> is doing this way to find best pre and post dividers.
>
> Signed-off-by: Ye Li <ye...@nxp.com>
> ---
> arch/arm/cpu/armv7/mx6/clock.c | 4 ----
> 1 files changed, 0 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c
> index 007204d..88380a6 100644
> --- a/arch/arm/cpu/armv7/mx6/clock.c
> +++ b/arch/arm/cpu/armv7/mx6/clock.c
> @@ -638,10 +638,6 @@ void mxs_set_lcdclk(u32 base_addr, u32 freq)
> }
>
> temp = freq * max_pred * max_postd;
> - if (temp > max) {
> - puts("Please decrease freq, too large!\n");
> - return;
> - }
> if (temp < min) {
> /*
> * Register: PLL_VIDEO
>
Reviewed-by: Stefano Babic <sba...@denx.de>
Best regards,
Stefano Babic
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