On Tue, Jan 19, 2016 at 2:39 PM, Bin Meng <bmeng...@gmail.com> wrote: > On Mon, Jan 18, 2016 at 6:55 PM, Stefan Roese <s...@denx.de> wrote: >> This patch adds the documentation for the memory-down parameters >> of the Intel FSP. To configure a board without SPD DDR DIMM but >> with onboard DDR chips. The values are taken from the coreboot >> header: >> >> src/soc/intel/fsp_baytrail/chip.h >> >> (git ID da1a70ea from 2016-01-16 as reference). >> >> Signed-off-by: Stefan Roese <s...@denx.de> >> Cc: Andrew Bradford <andrew.bradf...@kodakalaris.com> >> Cc: Bin Meng <bmeng...@gmail.com> >> Cc: Simon Glass <s...@chromium.org> >> --- >> .../misc/intel,baytrail-fsp.txt | 31 >> +++++++++++++++++++++- >> 1 file changed, 30 insertions(+), 1 deletion(-) >> > > Reviewed-by: Bin Meng <bmeng...@gmail.com>
applied to u-boot-x86/master, thanks! _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
