On 05/01/2016 20:02, Fabio Estevam wrote: > From: Fabio Estevam <fabio.este...@nxp.com> > > As per the AR8031 datasheet: > > "For a reliable power on reset, suggest to keep asserting the reset > low long enough (10ms) to ensure the clock is stable and clock-to-reset > 1ms requirement is satisfied." > > So do as suggested and also add a 100us delay after deasserting the > reset line to guarantee that the PHY ID can be read correctly and the > Atheros 8031 PHY driver can be loaded automatically. > > This results in a simpler code. > > Signed-off-by: Fabio Estevam <fabio.este...@nxp.com> > ---
Applied (fix) to u-boot-imx, thanks ! Best regards, Stefano Babic -- ===================================================================== DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de ===================================================================== _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
