From: Dinh Nguyen <dinh.li...@gmail.com> We should be setting the FPGA Interface Group global bit that will correctly disable all interfaces between the FPGA and HPS.
Signed-off-by: Dinh Nguyen <dingu...@opensource.altera.com> --- drivers/fpga/socfpga.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/fpga/socfpga.c b/drivers/fpga/socfpga.c index 4448250..431e159 100644 --- a/drivers/fpga/socfpga.c +++ b/drivers/fpga/socfpga.c @@ -269,7 +269,7 @@ int socfpga_load(Altera_desc *desc, const void *rbf_data, size_t rbf_size) /* Prior programming the FPGA, all bridges need to be shut off */ /* Disable all signals from hps peripheral controller to fpga */ - writel(0, &sysmgr_regs->fpgaintfgrp_module); + writel(0, &sysmgr_regs->fpgaintfgrp_gbl); /* Disable all signals from FPGA to HPS SDRAM */ #define SDR_CTRLGRP_FPGAPORTRST_ADDRESS 0x5080 -- 2.6.2 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot