On 22 December 2015 at 13:14, Wills Wang <wills.w...@live.com> wrote:
> Signed-off-by: Wills Wang <wills.w...@live.com>
> ---
>
> drivers/spi/Makefile | 1 +
> drivers/spi/ath79_spi.c | 142
> ++++++++++++++++++++++++++++++++++++++++++++++++
Please write it on driver-model, we're accepting new drivers will be
in driver-model format.
> 2 files changed, 143 insertions(+)
> create mode 100644 drivers/spi/ath79_spi.c
>
> diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
> index 3eca745..7fb2926 100644
> --- a/drivers/spi/Makefile
> +++ b/drivers/spi/Makefile
> @@ -17,6 +17,7 @@ endif
>
> obj-$(CONFIG_ALTERA_SPI) += altera_spi.o
> obj-$(CONFIG_ARMADA100_SPI) += armada100_spi.o
> +obj-$(CONFIG_ATH79_SPI) += ath79_spi.o
> obj-$(CONFIG_ATMEL_DATAFLASH_SPI) += atmel_dataflash_spi.o
> obj-$(CONFIG_ATMEL_SPI) += atmel_spi.o
> obj-$(CONFIG_BFIN_SPI) += bfin_spi.o
> diff --git a/drivers/spi/ath79_spi.c b/drivers/spi/ath79_spi.c
> new file mode 100644
> index 0000000..e9a9dd2
> --- /dev/null
> +++ b/drivers/spi/ath79_spi.c
> @@ -0,0 +1,142 @@
> +/*
> + * (C) Copyright 2015
> + * Wills Wang, <wills.w...@live.com>
> + *
> + * SPDX-License-Identifier: GPL-2.0+
> + */
> +
> +#include <common.h>
> +#include <malloc.h>
> +#include <spi.h>
> +#include <asm/io.h>
> +#include <asm/addrspace.h>
> +#include <asm/types.h>
> +#include <asm/arch/ar71xx_regs.h>
> +
> +#define REG_READ(b, o) readl(KSEG1ADDR(b + o))
> +#define REG_WRITE(b, o, v) writel((v), KSEG1ADDR(b + o))
> +#define SPI_READ(a) REG_READ(AR71XX_SPI_BASE, a)
> +#define SPI_WRITE(a, v) REG_WRITE(AR71XX_SPI_BASE, a, v)
> +
> +/* CLOCK_DIVIDER = 3 (SPI clock = 200 / 8 ~ 25 MHz) */
> +#define SPI_CLK_DIV(x) ((x >> 1) - 1)
> +
> +struct ar71xx_spi_slave {
> + struct spi_slave slave;
> + unsigned int mode;
> +};
> +
> +static inline struct ar71xx_spi_slave *to_ar71xx_spi(struct spi_slave *slave)
> +{
> + return container_of(slave, struct ar71xx_spi_slave, slave);
> +}
> +
> +void spi_init(void)
> +{
> + /* Init SPI Hardware, disable remap, set clock */
> + SPI_WRITE(AR71XX_SPI_REG_FS, AR71XX_SPI_FS_GPIO);
> + SPI_WRITE(AR71XX_SPI_REG_CTRL, AR71XX_SPI_CTRL_RD | SPI_CLK_DIV(8));
> + SPI_WRITE(AR71XX_SPI_REG_FS, 0);
> +}
> +
> +struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
> + unsigned int max_hz, unsigned int mode)
> +{
> + struct ar71xx_spi_slave *ss;
> +
> + if (bus || (cs > 2))
> + return NULL;
> +
> + ss = malloc(sizeof(struct ar71xx_spi_slave));
> + if (!ss)
> + return NULL;
> + memset(ss, 0, sizeof(struct ar71xx_spi_slave));
> +
> + ss->slave.bus = bus;
> + ss->slave.cs = cs;
> + ss->slave.memory_map = (void *)KSEG0ADDR(AR71XX_SPI_BASE);
> + ss->mode = mode;
> +
> + return &ss->slave;
> +}
> +
> +void spi_free_slave(struct spi_slave *slave)
> +{
> + struct ar71xx_spi_slave *ss = to_ar71xx_spi(slave);
> +
> + free(ss);
> +}
> +
> +int spi_claim_bus(struct spi_slave *slave)
> +{
> + return 0;
> +}
> +
> +void spi_release_bus(struct spi_slave *slave)
> +{
> +}
> +
> +int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
> + void *din, unsigned long flags)
> +{
> + uint8_t *rx = din;
> + const uint8_t *tx = dout;
> + uint8_t curbyte, curbitlen, restbits;
> + uint32_t bytes = bitlen / 8;
> + uint32_t out;
> + uint32_t in;
> +
> + if (flags & SPI_XFER_BEGIN) {
> + SPI_WRITE(AR71XX_SPI_REG_FS, AR71XX_SPI_FS_GPIO);
> + SPI_WRITE(AR71XX_SPI_REG_IOC, AR71XX_SPI_IOC_CS_ALL);
> + }
> +
> + restbits = (bitlen % 8);
> + if (restbits)
> + bytes++;
> +
> + /* enable chip select */
> + out = AR71XX_SPI_IOC_CS_ALL & ~(AR71XX_SPI_IOC_CS(slave->cs));
> + while (bytes--) {
> + curbyte = 0;
> + if (tx)
> + curbyte = *tx++;
> +
> + if (restbits) {
> + curbitlen = restbits;
> + curbyte <<= 8 - restbits;
> + } else {
> + curbitlen = 8;
> + }
> +
> + /* clock starts at inactive polarity */
> + for (curbyte <<= (8 - curbitlen); curbitlen; curbitlen--) {
> + if (curbyte & 0x80)
> + out |= AR71XX_SPI_IOC_DO;
> + else
> + out &= ~(AR71XX_SPI_IOC_DO);
> +
> + /* setup MSB (to slave) on trailing edge */
> + SPI_WRITE(AR71XX_SPI_REG_IOC, out);
> + SPI_WRITE(AR71XX_SPI_REG_IOC, out |
> AR71XX_SPI_IOC_CLK);
> +
> + curbyte <<= 1;
> + }
> +
> + in = SPI_READ(AR71XX_SPI_REG_RDS);
> + if (rx) {
> + if (restbits)
> + *rx++ = (in << (8 - restbits));
> + else
> + *rx++ = in;
> + }
> + }
> +
> + if (flags & SPI_XFER_END) {
> + SPI_WRITE(AR71XX_SPI_REG_IOC, AR71XX_SPI_IOC_CS(slave->cs));
> + SPI_WRITE(AR71XX_SPI_REG_IOC, AR71XX_SPI_IOC_CS_ALL);
> + SPI_WRITE(AR71XX_SPI_REG_FS, 0);
> + }
> +
> + return 0;
> +}
> --
> 1.9.1
>
> _______________________________________________
> U-Boot mailing list
> U-Boot@lists.denx.de
> http://lists.denx.de/mailman/listinfo/u-boot
--
Jagan.
_______________________________________________
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
