Add common configuration bits for the Denali NAND controller and also support for using it as a boot device in SPL.
Signed-off-by: Marek Vasut <ma...@denx.de> Cc: Dinh Nguyen <dingu...@opensource.altera.com> Cc: Chin Liang See <cl...@altera.com> --- include/configs/socfpga_common.h | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 4124d8b..8886ccf 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -162,6 +162,19 @@ #endif /* + * NAND Support + */ +#ifdef CONFIG_NAND_DENALI +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_MAX_CHIPS 1 +#define CONFIG_SYS_NAND_ONFI_DETECTION +#define CONFIG_NAND_DENALI_ECC_SIZE 512 +#define CONFIG_SYS_NAND_REGS_BASE 0xffb80000 +#define CONFIG_SYS_NAND_DATA_BASE 0xff900000 +#define CONFIG_SYS_NAND_BASE (CONFIG_SYS_NAND_DATA_BASE + 0x10) +#endif + +/* * I2C support */ #define CONFIG_SYS_I2C @@ -302,6 +315,9 @@ unsigned int cm_get_qspi_controller_clk_hz(void); #ifdef CONFIG_DM_SPI #define CONFIG_SPL_SPI_SUPPORT #endif +#ifdef CONFIG_SPL_NAND_DENALI +#define CONFIG_SPL_NAND_SUPPORT +#endif /* SPL SDMMC boot support */ #ifdef CONFIG_SPL_MMC_SUPPORT @@ -324,6 +340,13 @@ unsigned int cm_get_qspi_controller_clk_hz(void); #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x40000 #endif +/* SPL NAND boot support */ +#ifdef CONFIG_SPL_NAND_SUPPORT +#define CONFIG_SYS_NAND_USE_FLASH_BBT +#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 +#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000 +#endif + /* * Stack setup */ -- 2.1.4 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
