Le 16/12/2015 10:41, Gregory CLEMENT a écrit :
> Hi Andreas,
>
> On mer., déc. 16 2015, "Andreas Bießmann" <andreas.de...@googlemail.com>
> wrote:
>
>> Hi all,
>>
>> On 16.12.2015 10:19, Nicolas Ferre wrote:
>>> Le 15/12/2015 20:59, Joe Hershberger a écrit :
>>>> Hi Gregory,
>>>>
>>>> On Mon, Dec 14, 2015 at 10:37 AM, Gregory CLEMENT
>>>> <gregory.clem...@free-electrons.com> wrote:
>>>>> During the initialization of PHY the gigabit bit capable is set if the
>>>>> controller is a GEM. However, for sama5d4, the GEM is not gigabit
>>>>> capable. Improperly setting the GBE capability leads to an unresponsive
>>>>> MAC controller. This patch fix this behavior allowing to use the gmac
>>>>> with the sama5d4.
>>>>>
>>>>> Suggested-by: Nicolas Ferre <nicolas.fe...@atmel.com>
>>>>> Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
>>>>> ---
>>>>> drivers/net/macb.c | 7 +++++--
>>>>> 1 file changed, 5 insertions(+), 2 deletions(-)
>>>>>
>>>>> diff --git a/drivers/net/macb.c b/drivers/net/macb.c
>>>>> index a5c1880..642717d 100644
>>>>> --- a/drivers/net/macb.c
>>>>> +++ b/drivers/net/macb.c
>>>>> @@ -480,8 +480,11 @@ static int macb_phy_init(struct macb_device *macb)
>>>>> return 0;
>>>>> }
>>>>>
>>>>> - /* First check for GMAC */
>>>>> - if (macb_is_gem(macb)) {
>>>>> + /*
>>>>> + * First check for GMAC, but not the one on SAMA5D4 which is
>>>>> + * not gigabit capabale
>>>>> + */
>>>>> + if (macb_is_gem(macb) && ! cpu_is_sama5d4()) {
>>>>
>>>> Is there not some other property that can identify the lack of Gigabit
>>>> support in the "GEM"? It would be better to not have to keep track of
>>>> the next processor and the one after that which has the same
>>>> situation.
>>>
>>> Actually, sama5d2 is in the same situation already...
>>
>> would it be a compromise to patch the macb_is_gem() in favor of the
>> different usages of this function?
>
> I was thinking of introducing a is_gb_capable() function.
>
>>
>> On the other hand I also wonder why the MACB IP tells it is GiB capable
>> by the IDNUM bitfield. Isn't there a possibility to fix this
>> detection?
>
> the first part of the IDNUM identify the generation of this IP and 0x1
> is MACB whereas 0x2 is GEM. As I wrote in my previous email, I _think_
> that the GEM is really GiB capabale but the SoC around do not provde the
> needed ressource for this (such as line running at GHz).
Actually, the GEM IP from Cadence can be configured to only do
10/100Mbs. So the IP ID doesn't tell that and the design configuration
registers don't seem to reflect that.
Bye,
--
Nicolas Ferre
_______________________________________________
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
