On Wed, Dec 02, 2015 at 03:27:56PM +0100, Egli, Samuel wrote:

> This patch fixes the DDR3 initialization procedure in
> order to comply with DDR3 standard. A 500 us delay is specified
> between the DDR3 reset and clock enable signal. Until now,
> this delay was not respected. Some DDR3 chips don't bother
> but the bigger the RAM becomes the more likely it seems that
> this delay is needed. We observed that DRAM > 256 MB from
> the manufacturer Samsung have an issue when the specification
> is not respected.
> 
> Changes:
> 
> 1) Add a 1 ms wait for L3 timeout error trigger
> 
> 2) Don't delay DDR3 initialization
> Bit 31 of emif_sdram_ref_ctrl shouldn't be set because his
> suppresses the initialization of DDR3
> 
> Signed-off-by: Samuel Egli <samuel.e...@siemens.com>
> Reviewed-by: James Doublesin <double...@ti.com>
> Cc: Tom Rini <tr...@konsulko.com>
> Cc: Felipe Balbi <ba...@ti.com>
> Cc: Roger Meier <r.me...@siemens.com>
> Cc: Heiko Schocher <h...@denx.de>

Applied to u-boot/master, thanks!

-- 
Tom

Attachment: signature.asc
Description: Digital signature

_______________________________________________
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

Reply via email to