On Thu, Nov 05, 2015 at 12:43:42PM -0200, Fabio Estevam wrote: > Many SPI flashes have protection bits (BP2, BP1 and BP0) in the > status register that can protect selected regions of the SPI NOR. > > Take these bits into account when performing erase operations, > making sure that the protected areas are skipped. > > Tested on a mx6qsabresd: > > => sf probe > SF: Detected M25P32 with page size 256 Bytes, erase size 64 KiB, total 4 MiB > => sf protect lock 0x3f0000 0x10000 > => sf erase 0x3f0000 0x10000 > offset 0x3f0000 is protected and cannot be erased > SF: 65536 bytes @ 0x3f0000 Erased: ERROR > => sf protect unlock 0x3f0000 0x10000 > => sf erase 0x3f0000 0x10000 > SF: 65536 bytes @ 0x3f0000 Erased: OK > > Signed-off-by: Fabio Estevam <fabio.este...@freescale.com> > [re-worked to fit the lock common to dm and non-dm] > Signed-off-by: Jagan Teki <jt...@openedev.com> > Reviewed-by: Tom Rini <tr...@konsulko.com> > Reviewed-by: Heiko Schocher <h...@denx.de> > Reviewed-by: Jagan Teki <jt...@openedev.com>
Applied to u-boot/master, thanks! -- Tom
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