Remove unused macro.

Signed-off-by: Thomas Chou <tho...@wytron.com.tw>
---
 drivers/net/altera_tse.h | 44 --------------------------------------------
 1 file changed, 44 deletions(-)

diff --git a/drivers/net/altera_tse.h b/drivers/net/altera_tse.h
index f751f6a..14c064b 100644
--- a/drivers/net/altera_tse.h
+++ b/drivers/net/altera_tse.h
@@ -14,20 +14,12 @@
 #define __packed_1_    __packed __aligned(1)
 
 /* SGDMA Stuff */
-#define ALT_SGDMA_STATUS_ERROR_MSK                     0x00000001
-#define ALT_SGDMA_STATUS_EOP_ENCOUNTERED_MSK           0x00000002
-#define ALT_SGDMA_STATUS_DESC_COMPLETED_MSK            0x00000004
-#define ALT_SGDMA_STATUS_CHAIN_COMPLETED_MSK           0x00000008
 #define ALT_SGDMA_STATUS_BUSY_MSK                      0x00000010
 
 #define ALT_SGDMA_CONTROL_RUN_MSK                      0x00000020
 #define ALT_SGDMA_CONTROL_STOP_DMA_ER_MSK              0x00000040
 #define ALT_SGDMA_CONTROL_SOFTWARERESET_MSK            0x00010000
 
-#define ALTERA_TSE_SGDMA_INTR_MASK  (ALT_SGDMA_CONTROL_IE_CHAIN_COMPLETED_MSK \
-                       | ALT_SGDMA_STATUS_DESC_COMPLETED_MSK \
-                       | ALT_SGDMA_CONTROL_IE_GLOBAL_MSK)
-
 /*
  * Descriptor control bit masks & offsets
  *
@@ -38,7 +30,6 @@
 #define ALT_SGDMA_DESCRIPTOR_CONTROL_GENERATE_EOP_MSK          0x00000001
 #define ALT_SGDMA_DESCRIPTOR_CONTROL_READ_FIXED_ADDRESS_MSK    0x00000002
 #define ALT_SGDMA_DESCRIPTOR_CONTROL_WRITE_FIXED_ADDRESS_MSK   0x00000004
-#define ALT_SGDMA_DESCRIPTOR_CONTROL_ATLANTIC_CHANNEL_MSK      0x00000008
 #define ALT_SGDMA_DESCRIPTOR_CONTROL_OWNED_BY_HW_MSK           0x00000080
 
 /*
@@ -48,15 +39,7 @@
  *      The following bit-offsets are expressed relative to the LSB of
  *      the status register bitfield.
  */
-#define ALT_SGDMA_DESCRIPTOR_STATUS_E_CRC_MSK                  0x00000001
-#define ALT_SGDMA_DESCRIPTOR_STATUS_E_PARITY_MSK               0x00000002
-#define ALT_SGDMA_DESCRIPTOR_STATUS_E_OVERFLOW_MSK             0x00000004
-#define ALT_SGDMA_DESCRIPTOR_STATUS_E_SYNC_MSK                 0x00000008
-#define ALT_SGDMA_DESCRIPTOR_STATUS_E_UEOP_MSK                 0x00000010
-#define ALT_SGDMA_DESCRIPTOR_STATUS_E_MEOP_MSK                 0x00000020
-#define ALT_SGDMA_DESCRIPTOR_STATUS_E_MSOP_MSK                 0x00000040
 #define ALT_SGDMA_DESCRIPTOR_STATUS_TERMINATED_BY_EOP_MSK      0x00000080
-#define ALT_SGDMA_DESCRIPTOR_STATUS_ERROR_MSK                  0x0000007F
 
 /*
  * The SGDMA controller buffer descriptor allocates
@@ -104,37 +87,10 @@ struct alt_sgdma_registers {
 /* TSE Stuff */
 #define ALTERA_TSE_CMD_TX_ENA_MSK              0x00000001
 #define ALTERA_TSE_CMD_RX_ENA_MSK              0x00000002
-#define ALTERA_TSE_CMD_XON_GEN_MSK             0x00000004
 #define ALTERA_TSE_CMD_ETH_SPEED_MSK           0x00000008
-#define ALTERA_TSE_CMD_PROMIS_EN_MSK           0x00000010
-#define ALTERA_TSE_CMD_PAD_EN_MSK              0x00000020
-#define ALTERA_TSE_CMD_CRC_FWD_MSK             0x00000040
-#define ALTERA_TSE_CMD_PAUSE_FWD_MSK           0x00000080
-#define ALTERA_TSE_CMD_PAUSE_IGNORE_MSK                0x00000100
-#define ALTERA_TSE_CMD_TX_ADDR_INS_MSK         0x00000200
 #define ALTERA_TSE_CMD_HD_ENA_MSK              0x00000400
-#define ALTERA_TSE_CMD_EXCESS_COL_MSK          0x00000800
-#define ALTERA_TSE_CMD_LATE_COL_MSK            0x00001000
 #define ALTERA_TSE_CMD_SW_RESET_MSK            0x00002000
-#define ALTERA_TSE_CMD_MHASH_SEL_MSK           0x00004000
-#define ALTERA_TSE_CMD_LOOPBACK_MSK            0x00008000
-/* Bits (18:16) = address select */
-#define ALTERA_TSE_CMD_TX_ADDR_SEL_MSK         0x00070000
-#define ALTERA_TSE_CMD_MAGIC_ENA_MSK           0x00080000
-#define ALTERA_TSE_CMD_SLEEP_MSK               0x00100000
-#define ALTERA_TSE_CMD_WAKEUP_MSK              0x00200000
-#define ALTERA_TSE_CMD_XOFF_GEN_MSK            0x00400000
-#define ALTERA_TSE_CMD_CNTL_FRM_ENA_MSK                0x00800000
-#define ALTERA_TSE_CMD_NO_LENGTH_CHECK_MSK     0x01000000
 #define ALTERA_TSE_CMD_ENA_10_MSK              0x02000000
-#define ALTERA_TSE_CMD_RX_ERR_DISC_MSK         0x04000000
-/* Bits (30..27) reserved */
-#define ALTERA_TSE_CMD_CNT_RESET_MSK           0x80000000
-
-#define ALTERA_TSE_TX_CMD_STAT_TX_SHIFT16      0x00040000
-#define ALTERA_TSE_TX_CMD_STAT_OMIT_CRC                0x00020000
-
-#define ALTERA_TSE_RX_CMD_STAT_RX_SHIFT16      (0x02000000)
 
 #define ALT_TSE_SW_RESET_TIMEOUT               (3 * CONFIG_SYS_HZ)
 #define ALT_TSE_SGDMA_BUSY_TIMEOUT             (3 * CONFIG_SYS_HZ)
-- 
2.5.0

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