On 24 October 2015 at 09:08, Jagan Teki <jt...@openedev.com> wrote: > This series replaces numerical bit shitfts and mask values > with BIT and GENMASK macro's > > Changes for v5: > - Dropped exynos_spi BIT changes > - Removed GENMASK for 0XFF on cadence_qspi_qpb > - Split the commit message body > Changes for v4: > - Patch split for individual drivers. > Changes for v3, v2: > - none > > Jagan Teki (23): > spi: zynq_[q]spi: Use BIT macro > spi: zynq_[q]spi: Use GENMASK macro > spi: altera_spi: Use BIT macro > spi: atmel_spi: Use BIT macro > spi: bfin_spi6xx: Use BIT macro > spi: cadence_qspi_apb: Use BIT macro > spi: designware_spi: Use BIT macro > spi: fsl: Use BIT macro > spi: ich: Use BIT macro > spi: mpc8xxx_spi: Use BIT macro > spi: omap3_spi: Use BIT macro > spi: sh_qspi: Use BIT macro > spi: tegra: Use BIT macro > spi: ti_qspi: Use BIT macro > spi: xilinx_spi: Use BIT macro > spi: atmel_spi: Use GENMASK > spi: cadence_qspi_apb: Use GENMASK > spi: designware_spi: Use GENMASK > spi: fsl_qspi: Use GENMASK > spi: mxs_spi: Use GENMASK > spi: omap3_spi: Use GENMASK > spi: tegra: Use GENMASK > spi: xilinx_spi: Use GENMASK
Except cadence_qspi_apb and mxs_spi genmask changes all are Applied to u-boot-spi/master thanks! -- Jagan. _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
