Hi Simon 2015-10-23 0:30 GMT+08:00 Simon Glass <s...@chromium.org>:
> Hi Eddie, > > On 22 October 2015 at 10:01, Eddie Cai <eddie....@rock-chips.com> wrote: > > Hi Simon > > > > 2015-10-22 22:07 GMT+08:00 Simon Glass <s...@chromium.org>: > >> > >> Hi Lin, > >> > >> On 20 October 2015 at 20:37, Lin Huang <h...@rock-chips.com> wrote: > >> > it may not use SPL in other rockchip SOC, so move SUPPORT_SPL and > >> > SPL config to rk3288 configuration. > >> > > >> > Signed-off-by: Lin Huang <h...@rock-chips.com> > >> > --- > >> > Changes in v1: None > >> > > >> > arch/arm/Kconfig | 2 -- > >> > arch/arm/mach-rockchip/Kconfig | 2 ++ > >> > 2 files changed, 2 insertions(+), 2 deletions(-) > >> > > >> > diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig > >> > index 194fb7b..40fa741 100644 > >> > --- a/arch/arm/Kconfig > >> > +++ b/arch/arm/Kconfig > >> > @@ -831,8 +831,6 @@ config TARGET_STM32F429_DISCOVERY > >> > > >> > config ARCH_ROCKCHIP > >> > bool "Support Rockchip SoCs" > >> > - select SUPPORT_SPL > >> > - select SPL > >> > select OF_CONTROL > >> > select CPU_V7 > >> > select DM > >> > diff --git a/arch/arm/mach-rockchip/Kconfig > >> > b/arch/arm/mach-rockchip/Kconfig > >> > index ab50f4e..15cd380 100644 > >> > --- a/arch/arm/mach-rockchip/Kconfig > >> > +++ b/arch/arm/mach-rockchip/Kconfig > >> > @@ -2,6 +2,8 @@ if ARCH_ROCKCHIP > >> > > >> > config ROCKCHIP_RK3288 > >> > bool "Support Rockchip RK3288" > >> > + select SUPPORT_SPL > >> > + select SPL > >> > help > >> > The Rockchip RK3288 is a ARM-based SoC with a quad-core > >> > Cortex-A17 > >> > including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two > >> > -- > >> > 1.9.1 > >> > > >> > >> We should avoid little binary blobs for booting the chip. I think we > >> can live with this as a stepping stone to having a proper SPL, but > >> what is the plan for a proper SPL in U-Boot? > > > > RK3036 have only 8k sram. 4k used by boot rom. The ddr initialize code is > > almost 4k. So i don't think we can do SPL. > > How does U-Boot get loaded in this case? Does it use ROM code? If so > Yes, it use boot rom code to load U-Boot > then I think we should create an SPL that handles the DDR init and > then returns to the ROM code for loading U-Boot. Also we should > document how this works in the README. > It is a good news you agree we can return to boot rom from SPL. Do you know what size of sram a smallest SPL need? > > Regards, > Simon > > > -- Eddie _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
