On Fri, Oct 9, 2015 at 5:38 PM, Anthony Felice <tony.fel...@timesys.com> wrote:
> This commit fixes a typo in vf610twr DRAM init that was causing a hang in
> U-Boot for the Vybrid Tower. This typo was introduced in commit 3f353cecc
> (vf610: refactor DDRMC code).
>
> Signed-off-by: Anthony Felice <tony.fel...@timesys.com>

Reviewed-by: Fabio Estevam <fabio.este...@freescale.com>
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