Hi Sjoerd,
On 5 October 2015 at 10:04, Sjoerd Simons <sjoerd.sim...@collabora.co.uk> wrote:
> On Sat, 2015-10-03 at 15:29 +0100, Simon Glass wrote:
>> > On 1 October 2015 at 10:48, Sjoerd Simons <
>> > sjoerd.sim...@collabora.co.uk> wrote:Add support for the gmac
>> > ethernet interface to pinctrl. This hardcodes
>
>> > the setup to match that of the firefly and Radxa Rock2 boards,
>> > using the
>> > RGMII phy mode for gmac interface and GPIO4B0 as the phy reset
>> > GPIO.
>> >
>> > Signed-off-by: Sjoerd Simons <sjoerd.sim...@collabora.co.uk>
>> > ---
>> >
>> > arch/arm/include/asm/arch-rockchip/grf_rk3288.h | 228
>> > ++++++++++++++++++++++++
>> > arch/arm/include/asm/arch-rockchip/periph.h | 1 +
>> > drivers/pinctrl/rockchip/pinctrl_rk3288.c | 102 +++++++++++
>> > 3 files changed, 331 insertions(+)
>> >
>> > diff --git a/arch/arm/include/asm/arch-rockchip/grf_rk3288.h
>> > b/arch/arm/include/asm/arch-rockchip/grf_rk3288.h
>> > index 0117a17..b7dda47 100644
>> > --- a/arch/arm/include/asm/arch-rockchip/grf_rk3288.h
>> > +++ b/arch/arm/include/asm/arch-rockchip/grf_rk3288.h
>> > + /* Assuming GPIO4B0_GPIO is phy-reset*/
>>
>> Space before */
>> + GPIO4B1_MASK << GPIO4B1_SHIFT |
>>
>> Would this normally be handled by a GPIO? Does it belong in pinmux?
>
> Hrm, i'm changing the wrong pin there aren't I, woops (well either that
> or the comment is wrong)? Anyway, yes the PHY reset is typically a
> GPIO, this should just set up the respective pin in GPIO mode which is
> the job of pinmuxing right ? :)
>
> Or maybe i'm misunderstanding your comment here?
I would hope that this would use gpio_request_by_name() instead, with
the GPIO specified in the device tree. See for example:
vcc_sd: sdmmc-regulator {
compatible = "regulator-fixed";
gpio = <&gpio7 11 GPIO_ACTIVE_LOW>;
...
};
Regards,
Simon
_______________________________________________
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
