On Fri, 2015-09-11 at 08:23 +0200, Stefan Roese wrote:
> This patch adds support for 4-bit ECC BCH4 for the SPEAr600 SoC. This can
> be used by boards equipped with a NAND chip that requires 4-bit ECC
> strength.
> The SPEAr600 HW ECC only supports 1-bit ECC strength.
>
> To enable SW BCH4, you need to specify this in your config header:
>
> And use the command "nandecc bch4" to select this ECC scheme upon runtime.
>
> Tested on SPEAr600 x600 board.
>
> Signed-off-by: Stefan Roese <s...@denx.de>
> Cc: Scott Wood <scottw...@freescale.com>
> Acked-by: Viresh Kumar <viresh.ku...@linaro.org>
> ---
> v3:
> - Don't set .caclulate, .correct, and .bytes for NAND_ECC_SOFT_BCH as this
> will be done in nand_scan_tail()
> - Set .caclulate back to fsmc_read_hwecc() in the HW case
> - Added comment that this function will only be called on SPEAr platforms,
> not supporting the BCH8 HW ECC (FSMC_VER8)
>
> v2:
> - Removed err = 0 initialization as suggested by Viresh
> - Completed the commit text
> - Added Viresh's Acked-by
>
> drivers/mtd/nand/fsmc_nand.c | 47
> ++++++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 47 insertions(+)
>
> diff --git a/drivers/mtd/nand/fsmc_nand.c b/drivers/mtd/nand/fsmc_nand.c
> index 567eff0..fe57b16 100644
> --- a/drivers/mtd/nand/fsmc_nand.c
> +++ b/drivers/mtd/nand/fsmc_nand.c
> @@ -390,6 +390,53 @@ static int fsmc_read_page_hwecc(struct mtd_info *mtd,
> struct nand_chip *chip,
> return 0;
> }
>
> +#ifndef CONFIG_SPL_BUILD
> +/*
> + * fsmc_nand_switch_ecc - switch the ECC operation between different
> engines
> + *
> + * @eccstrength - the number of bits that could be corrected
> + * (1 - HW, 4 - SW BCH4)
> + */
> +int __maybe_unused fsmc_nand_switch_ecc(uint32_t eccstrength)
Why do you need __maybe_unused on a non-static function?
> +{
> + struct nand_chip *nand;
> + struct mtd_info *mtd;
> + int err;
> +
> + /*
> + * This functions is only called on SPEAr600 platforms, supporting
> + * 1 bit HW ECC. The BCH8 HW ECC (FSMC_VER8) from the ST-Ericsson
> + * Nomadik SoC is currently supporting this fsmc_nand_switch_ecc()
> + * function, as it doesn't need to switch to a different ECC layout.
> + */
> + mtd = &nand_info[nand_curr_device];
> + nand = mtd->priv;
> +
> + /* Setup the ecc configurations again */
> + if (eccstrength == 1) {
> + nand->ecc.mode = NAND_ECC_HW;
> + nand->ecc.bytes = 3;
> + nand->ecc.strength = 1;
> + nand->ecc.layout = &fsmc_ecc1_layout;
> + nand->ecc.calculate = fsmc_read_hwecc;
> + nand->ecc.correct = nand_correct_data;
> + } else {
> + /*
> + * .calculate .correct and .bytes will be set in
> + * nand_scan_tail()
> + */
> + nand->ecc.mode = NAND_ECC_SOFT_BCH;
> + nand->ecc.strength = 4;
> + nand->ecc.layout = NULL;
> + }
Even though you say this function will currently not be called on systems
with BCH8 hardware, it would be good to at least test explicitly for
eccstrength == 4 and error out if something other than 1 or 4 is requested.
-Scott
_______________________________________________
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
