On Thu 2015-09-10 00:01:12, Chin Liang See wrote:
> Ensuring spi_calibration is run when there is a change of sclk
> frequency. This will ensure the qspi flash access works for high
> sclk frequency
>
> Signed-off-by: Chin Liang See <cl...@altera.com>
> Cc: Dinh Nguyen <dingu...@opensource.altera.com>
> Cc: Dinh Nguyen <dinh.li...@gmail.com>
> Cc: Marek Vasut <ma...@denx.de>
> Cc: Stefan Roese <s...@denx.de>
> Cc: Vikas Manocha <vikas.mano...@st.com>
> Cc: Jagannadh Teki <jt...@openedev.com>
Acked-by: Pavel Machek <pa...@denx.de>
> --- a/drivers/spi/cadence_qspi.c
> +++ b/drivers/spi/cadence_qspi.c
> @@ -37,15 +37,18 @@ static int cadence_spi_write_speed(struct udevice *bus,
> uint hz)
> }
>
> /* Calibration sequence to determine the read data capture delay register */
> -static int spi_calibration(struct udevice *bus)
> +static int spi_calibration(struct udevice *bus, uint hz)
I'd do "unsigned int" here, for consistency with
> @@ -38,6 +38,7 @@ struct cadence_spi_priv {
> int qspi_is_init;
> unsigned int qspi_calibrated_hz;
> unsigned int qspi_calibrated_cs;
> + unsigned int previous_hz;
> };
this, but that's nitpicking.
Thanks,
Pavel
--
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures)
http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
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