This board has not been converted to generic board by the deadline.
Remove it.
Signed-off-by: Simon Glass <s...@chromium.org>
---
arch/arm/Kconfig | 6 --
board/ti/ti816x/Kconfig | 15 ---
board/ti/ti816x/MAINTAINERS | 6 --
board/ti/ti816x/Makefile | 12 ---
board/ti/ti816x/evm.c | 216 -------------------------------------------
configs/ti816x_evm_defconfig | 7 --
include/configs/ti816x_evm.h | 172 ----------------------------------
7 files changed, 434 deletions(-)
delete mode 100644 board/ti/ti816x/Kconfig
delete mode 100644 board/ti/ti816x/MAINTAINERS
delete mode 100644 board/ti/ti816x/Makefile
delete mode 100644 board/ti/ti816x/evm.c
delete mode 100644 configs/ti816x_evm_defconfig
delete mode 100644 include/configs/ti816x_evm.h
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 1a171d1..a87c724 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -378,11 +378,6 @@ config TARGET_BAV335X
For more information, visit: http://birdland.com/oem
-config TARGET_TI816X_EVM
- bool "Support ti816x_evm"
- select CPU_V7
- select SUPPORT_SPL
-
config TARGET_BCM28155_AP
bool "Support bcm28155_ap"
select CPU_V7
@@ -854,7 +849,6 @@ source "board/tbs/tbs2910/Kconfig"
source "board/ti/am335x/Kconfig"
source "board/ti/am43xx/Kconfig"
source "board/birdland/bav335x/Kconfig"
-source "board/ti/ti816x/Kconfig"
source "board/timll/devkit3250/Kconfig"
source "board/toradex/colibri_pxa270/Kconfig"
source "board/toradex/colibri_vf/Kconfig"
diff --git a/board/ti/ti816x/Kconfig b/board/ti/ti816x/Kconfig
deleted file mode 100644
index 95973b4..0000000
--- a/board/ti/ti816x/Kconfig
+++ /dev/null
@@ -1,15 +0,0 @@
-if TARGET_TI816X_EVM
-
-config SYS_BOARD
- default "ti816x"
-
-config SYS_VENDOR
- default "ti"
-
-config SYS_SOC
- default "am33xx"
-
-config SYS_CONFIG_NAME
- default "ti816x_evm"
-
-endif
diff --git a/board/ti/ti816x/MAINTAINERS b/board/ti/ti816x/MAINTAINERS
deleted file mode 100644
index d3de144..0000000
--- a/board/ti/ti816x/MAINTAINERS
+++ /dev/null
@@ -1,6 +0,0 @@
-TI816X BOARD
-#M: -
-S: Maintained
-F: board/ti/ti816x/
-F: include/configs/ti816x_evm.h
-F: configs/ti816x_evm_defconfig
diff --git a/board/ti/ti816x/Makefile b/board/ti/ti816x/Makefile
deleted file mode 100644
index f1cc3d5..0000000
--- a/board/ti/ti816x/Makefile
+++ /dev/null
@@ -1,12 +0,0 @@
-#
-# Copyright (C) 2013, Adeneo Embedded <www.adeneo-embedded.com>
-# Antoine Tenart, <aten...@adeneo-embedded.com>
-#
-# Based on TI-PSP-04.00.02.14 :
-#
-# Copyright (C) 2009, Texas Instruments, Incorporated
-#
-# SPDX-License-Identifier: GPL-2.0
-#
-
-obj-y := evm.o
diff --git a/board/ti/ti816x/evm.c b/board/ti/ti816x/evm.c
deleted file mode 100644
index b6bf162..0000000
--- a/board/ti/ti816x/evm.c
+++ /dev/null
@@ -1,216 +0,0 @@
-/*
- * evm.c
- *
- * Copyright (C) 2013, Adeneo Embedded <www.adeneo-embedded.com>
- * Antoine Tenart, <aten...@adeneo-embedded.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <spl.h>
-#include <asm/cache.h>
-#include <asm/io.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/cpu.h>
-#include <asm/arch/ddr_defs.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/sys_proto.h>
-#include <asm/arch/mmc_host_def.h>
-#include <asm/arch/mem.h>
-#include <asm/arch/mux.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-int board_init(void)
-{
- gd->bd->bi_boot_params = PHYS_DRAM_1 + 0x100;
- return 0;
-}
-
-#ifdef CONFIG_SPL_BUILD
-
-static struct module_pin_mux mmc_pin_mux[] = {
- { OFFSET(pincntl157), PULLDOWN_EN | PULLUDDIS | MODE(0x0) },
- { OFFSET(pincntl158), PULLDOWN_EN | PULLUDEN | MODE(0x0) },
- { OFFSET(pincntl159), PULLUP_EN | PULLUDDIS | MODE(0x0) },
- { OFFSET(pincntl160), PULLUP_EN | PULLUDDIS | MODE(0x0) },
- { OFFSET(pincntl161), PULLUP_EN | PULLUDDIS | MODE(0x0) },
- { OFFSET(pincntl162), PULLUP_EN | PULLUDDIS | MODE(0x0) },
- { OFFSET(pincntl163), PULLUP_EN | PULLUDDIS | MODE(0x0) },
- { -1 },
-};
-
-const struct dmm_lisa_map_regs evm_lisa_map_regs = {
- .dmm_lisa_map_0 = 0x00000000,
- .dmm_lisa_map_1 = 0x00000000,
- .dmm_lisa_map_2 = 0x80640300,
- .dmm_lisa_map_3 = 0xC0640320,
-};
-
-/*
- * DDR2 related definitions
- */
-#ifdef CONFIG_TI816X_EVM_DDR2
-static struct ddr_data ddr2_data = {
- .datardsratio0 = ((0x40<<10) | (0x40<<0)),
- .datawdsratio0 = ((0x4A<<10) | (0x4A<<0)),
- .datawiratio0 = ((0x0<<10) | (0x0<<0)),
- .datagiratio0 = ((0x0<<10) | (0x0<<0)),
- .datafwsratio0 = ((0x13A<<10) | (0x13A<<0)),
- .datawrsratio0 = ((0x8A<<10) | (0x8A<<0)),
-};
-
-static struct cmd_control ddr2_ctrl = {
- .cmd0csratio = 0x80,
- .cmd0iclkout = 0x00,
-
- .cmd1csratio = 0x80,
- .cmd1iclkout = 0x00,
-
- .cmd2csratio = 0x80,
- .cmd2iclkout = 0x00,
-
-};
-
-static struct emif_regs ddr2_emif0_regs = {
- .sdram_config = 0x43801A3A,
- .ref_ctrl = 0x10000C30,
- .sdram_tim1 = 0x0AAB15E2,
- .sdram_tim2 = 0x423631D2,
- .sdram_tim3 = 0x0080032F,
- .emif_ddr_phy_ctlr_1 = 0x0, /* depend on cpu rev, set later */
-};
-
-static struct emif_regs ddr2_emif1_regs = {
- .sdram_config = 0x43801A3A,
- .ref_ctrl = 0x10000C30,
- .sdram_tim1 = 0x0AAB15E2,
- .sdram_tim2 = 0x423631D2,
- .sdram_tim3 = 0x0080032F,
- .emif_ddr_phy_ctlr_1 = 0x0, /* depend on cpu rev, set later */
-};
-#endif
-
-/*
- * DDR3 related definitions
- */
-
-#if defined(CONFIG_TI816X_DDR_PLL_400)
-#define RD_DQS 0x03B
-#define WR_DQS 0x0A6
-#define RD_DQS_GATE 0x12A
-#define EMIF_SDCFG 0x62A41032
-#define EMIF_SDREF 0x10000C30
-#define EMIF_TIM1 0x0CCCE524
-#define EMIF_TIM2 0x30308023
-#define EMIF_TIM3 0x009F82CF
-#define EMIF_PHYCFG 0x0000010B
-#elif defined(CONFIG_TI816X_DDR_PLL_531)
-#define RD_DQS 0x039
-#define WR_DQS 0x0B4
-#define RD_DQS_GATE 0x13D
-#define EMIF_SDCFG 0x62A51832
-#define EMIF_SDREF 0x1000102E
-#define EMIF_TIM1 0x0EF136AC
-#define EMIF_TIM2 0x30408063
-#define EMIF_TIM3 0x009F83AF
-#define EMIF_PHYCFG 0x0000010C
-#elif defined(CONFIG_TI816X_DDR_PLL_675)
-#define RD_DQS 0x039
-#define WR_DQS 0x091
-#define RD_DQS_GATE 0x196
-#define EMIF_SDCFG 0x62A63032
-#define EMIF_SDREF 0x10001491
-#define EMIF_TIM1 0x13358875
-#define EMIF_TIM2 0x5051806C
-#define EMIF_TIM3 0x009F84AF
-#define EMIF_PHYCFG 0x0000010F
-#elif defined(CONFIG_TI816X_DDR_PLL_796)
-#define RD_DQS 0x035
-#define WR_DQS 0x093
-#define RD_DQS_GATE 0x1B3
-#define EMIF_SDCFG 0x62A73832
-#define EMIF_SDREF 0x10001841
-#define EMIF_TIM1 0x1779C9FE
-#define EMIF_TIM2 0x50608074
-#define EMIF_TIM3 0x009F857F
-#define EMIF_PHYCFG 0x00000110
-#endif
-
-static struct ddr_data ddr3_data = {
- .datardsratio0 = ((RD_DQS<<10) | (RD_DQS<<0)),
- .datawdsratio0 = ((WR_DQS<<10) | (WR_DQS<<0)),
- .datawiratio0 = ((0x20<<10) | 0x20<<0),
- .datagiratio0 = ((0x20<<10) | 0x20<<0),
- .datafwsratio0 = ((RD_DQS_GATE<<10) | (RD_DQS_GATE<<0)),
- .datawrsratio0 = (((WR_DQS+0x40)<<10) | ((WR_DQS+0x40)<<0)),
-};
-
-static const struct cmd_control ddr3_ctrl = {
- .cmd0csratio = 0x100,
- .cmd0iclkout = 0x001,
-
- .cmd1csratio = 0x100,
- .cmd1iclkout = 0x001,
-
- .cmd2csratio = 0x100,
- .cmd2iclkout = 0x001,
-};
-
-static const struct emif_regs ddr3_emif0_regs = {
- .sdram_config = EMIF_SDCFG,
- .ref_ctrl = EMIF_SDREF,
- .sdram_tim1 = EMIF_TIM1,
- .sdram_tim2 = EMIF_TIM2,
- .sdram_tim3 = EMIF_TIM3,
- .emif_ddr_phy_ctlr_1 = EMIF_PHYCFG,
-};
-
-static const struct emif_regs ddr3_emif1_regs = {
- .sdram_config = EMIF_SDCFG,
- .ref_ctrl = EMIF_SDREF,
- .sdram_tim1 = EMIF_TIM1,
- .sdram_tim2 = EMIF_TIM2,
- .sdram_tim3 = EMIF_TIM3,
- .emif_ddr_phy_ctlr_1 = EMIF_PHYCFG,
-};
-
-void set_uart_mux_conf(void) {}
-
-void set_mux_conf_regs(void)
-{
- configure_module_pin_mux(mmc_pin_mux);
-}
-
-void sdram_init(void)
-{
- config_dmm(&evm_lisa_map_regs);
-
-#ifdef CONFIG_TI816X_EVM_DDR2
- if (CONFIG_TI816X_USE_EMIF0) {
- ddr2_emif0_regs.emif_ddr_phy_ctlr_1 =
- (get_cpu_rev() == 0x1 ? 0x0000010B : 0x0000030B);
- config_ddr(0, NULL, &ddr2_data, &ddr2_ctrl, &ddr2_emif0_regs,
- 0);
- }
-
- if (CONFIG_TI816X_USE_EMIF1) {
- ddr2_emif1_regs.emif_ddr_phy_ctlr_1 =
- (get_cpu_rev() == 0x1 ? 0x0000010B : 0x0000030B);
- config_ddr(1, NULL, &ddr2_data, &ddr2_ctrl, &ddr2_emif1_regs,
- 1);
- }
-#endif
-
-#ifdef CONFIG_TI816X_EVM_DDR3
- if (CONFIG_TI816X_USE_EMIF0)
- config_ddr(0, NULL, &ddr3_data, &ddr3_ctrl, &ddr3_emif0_regs,
- 0);
-
- if (CONFIG_TI816X_USE_EMIF1)
- config_ddr(1, NULL, &ddr3_data, &ddr3_ctrl, &ddr3_emif1_regs,
- 1);
-#endif
-}
-#endif /* CONFIG_SPL_BUILD */
diff --git a/configs/ti816x_evm_defconfig b/configs/ti816x_evm_defconfig
deleted file mode 100644
index 1fd2719..0000000
--- a/configs/ti816x_evm_defconfig
+++ /dev/null
@@ -1,7 +0,0 @@
-CONFIG_ARM=y
-CONFIG_TARGET_TI816X_EVM=y
-CONFIG_SPL=y
-# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_FLASH is not set
-# CONFIG_CMD_SETEXPR is not set
-CONFIG_SYS_PROMPT="u-boot/ti816x# "
diff --git a/include/configs/ti816x_evm.h b/include/configs/ti816x_evm.h
deleted file mode 100644
index 01d8233..0000000
--- a/include/configs/ti816x_evm.h
+++ /dev/null
@@ -1,172 +0,0 @@
-/*
- * ti816x_evm.h
- *
- * Copyright (C) 2013, Adeneo Embedded <www.adeneo-embedded.com>
- * Antoine Tenart, <aten...@adeneo-embedded.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef __CONFIG_TI816X_EVM_H
-#define __CONFIG_TI816X_EVM_H
-
-#define CONFIG_TI81XX
-#define CONFIG_TI816X
-#define CONFIG_SYS_NO_FLASH
-#define CONFIG_OMAP
-#define CONFIG_OMAP_COMMON
-
-#define CONFIG_ARCH_CPU_INIT
-
-#include <asm/arch/omap.h>
-
-#define CONFIG_ENV_SIZE 0x2000
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (32 * 1024))
-#define CONFIG_SYS_LONGHELP /* undef save memory */
-#define CONFIG_SYS_HUSH_PARSER
-#define CONFIG_MACH_TYPE MACH_TYPE_TI8168EVM
-
-#define CONFIG_OF_LIBFDT
-#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG /* required for ramdisk support */
-
-#define CONFIG_VERSION_VARIABLE
-#define CONFIG_DISPLAY_CPUINFO
-
-#define CONFIG_BOOTDELAY 3 /* set negative for no autoboot */
-#define CONFIG_EXTRA_ENV_SETTINGS \
- "loadaddr=0x81000000\0" \
-
-#define CONFIG_BOOTCOMMAND \
- "mmc rescan;" \
- "fatload mmc 0 ${loadaddr} uImage;" \
- "bootm ${loadaddr}" \
-
-#define CONFIG_BOOTARGS "console=ttyO2,115200n8 noinitrd earlyprintk"
-
-/* Clock Defines */
-#define V_OSCK 24000000 /* Clock output from T2 */
-#define V_SCLK (V_OSCK >> 1)
-
-#define CONFIG_SYS_MAXARGS 32
-#define CONFIG_SYS_CBSIZE 512 /* console I/O buffer size */
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \
- + sizeof(CONFIG_SYS_PROMPT) + 16) /* print buffer size */
-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* boot arg buffer size */
-
-#define CONFIG_SYS_LOAD_ADDR 0x81000000 /* Default load address */
-
-#define CONFIG_CMD_ASKEN
-#define CONFIG_OMAP_GPIO
-#define CONFIG_MMC
-#define CONFIG_GENERIC_MMC
-#define CONFIG_OMAP_HSMMC
-#define CONFIG_CMD_MMC
-#define CONFIG_DOS_PARTITION
-#define CONFIG_CMD_FAT
-#define CONFIG_CMD_EXT2
-
-#define CONFIG_FS_FAT
-
-/*
- * Only one of the following two options (DDR3/DDR2) should be enabled
- * CONFIG_TI816X_EVM_DDR2
- * CONFIG_TI816X_EVM_DDR3
- */
-#define CONFIG_TI816X_EVM_DDR3
-
-/*
- * Supported values: 400, 531, 675 or 796 MHz
- */
-#define CONFIG_TI816X_DDR_PLL_796
-
-#define CONFIG_TI816X_USE_EMIF0 1
-#define CONFIG_TI816X_USE_EMIF1 1
-
-
-#define CONFIG_NR_DRAM_BANKS 2 /* we have 2 banks of DRAM */
-#define PHYS_DRAM_1 0x80000000 /* DRAM Bank #1 */
-#define PHYS_DRAM_1_SIZE 0x40000000 /* 1 GB */
-#define PHYS_DRAM_2 0xC0000000 /* DRAM Bank #2 */
-#define PHYS_DRAM_2_SIZE 0x40000000 /* 1 GB */
-
-#define CONFIG_MAX_RAM_BANK_SIZE (2048 << 20) /* 2048MB */
-#define CONFIG_SYS_SDRAM_BASE PHYS_DRAM_1
-#define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \
- GENERATED_GBL_DATA_SIZE)
-
-/**
- * Platform/Board specific defs
- */
-#define CONFIG_SYS_CLK_FREQ 27000000
-#define CONFIG_SYS_TIMERBASE 0x4802E000
-#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
-
-#undef CONFIG_NAND_OMAP_GPMC
-
-/*
- * NS16550 Configuration
- */
-#define CONFIG_SYS_NS16550
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE (-4)
-#define CONFIG_SYS_NS16550_CLK (48000000)
-#define CONFIG_SYS_NS16550_COM1 0x48024000 /* Base EVM has UART2 */
-
-#define CONFIG_BAUDRATE 115200
-
-/* allow overwriting serial config and ethaddr */
-#define CONFIG_ENV_OVERWRITE
-
-#define CONFIG_SERIAL1
-#define CONFIG_SERIAL2
-#define CONFIG_SERIAL3
-#define CONFIG_CONS_INDEX 1
-#define CONFIG_SYS_CONSOLE_INFO_QUIET
-
-#define CONFIG_ENV_IS_NOWHERE
-
-/* SPL */
-/* Defines for SPL */
-#define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SPL_TEXT_BASE 0x40400000
-#define CONFIG_SPL_MAX_SIZE ((128 - 18) * 1024)
-
-#define CONFIG_SPL_BSS_START_ADDR 0x80000000
-#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
-
-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
-#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
-#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
-#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
-#define CONFIG_SPL_MMC_SUPPORT
-#define CONFIG_SPL_FAT_SUPPORT
-
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_LIBDISK_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
-#define CONFIG_SPL_GPIO_SUPPORT
-#define CONFIG_SPL_YMODEM_SUPPORT
-#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
-#define CONFIG_SYS_SPI_U_BOOT_SIZE 0x40000
-#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
-
-#define CONFIG_SPL_BOARD_INIT
-
-#define CONFIG_SYS_TEXT_BASE 0x80800000
-#define CONFIG_SYS_SPL_MALLOC_START 0x80208000
-#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
-
-/* Since SPL did pll and ddr initialization for us,
- * we don't need to do it twice.
- */
-#ifndef CONFIG_SPL_BUILD
-#define CONFIG_SKIP_LOWLEVEL_INIT
-#endif
-
-/* Unsupported features */
-#undef CONFIG_USE_IRQ
-
-#endif
--
2.5.0.457.gab17608
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