Per new requirement, change default core frequency
from previous 1400MHz to 1200MHz to save power.

Signed-off-by: Shengzhou Liu <shengzhou....@freescale.com>
---
 board/freescale/t102xrdb/t1023_rcw.cfg | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/board/freescale/t102xrdb/t1023_rcw.cfg 
b/board/freescale/t102xrdb/t1023_rcw.cfg
index 1d11a2e..f8f7282 100644
--- a/board/freescale/t102xrdb/t1023_rcw.cfg
+++ b/board/freescale/t102xrdb/t1023_rcw.cfg
@@ -1,8 +1,8 @@
 #PBL preamble and RCW header for T1023RDB
 aa55aa55 010e0100
 #SerDes Protocol: 0x77
-#Core/DDR: 1400Mhz/1600MT/s with single source clock
-0810000e 00000000 00000000 00000000
+#Default Core=1200MHz, DDR=1600MT/s with single source clock
+0810000c 00000000 00000000 00000000
 3b800003 00000012 e8104000 21000000
 00000000 00000000 00000000 00022800
 00000130 04020200 00000000 00000006
-- 
2.1.0.27.g96db324

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