On 08/20/2015 03:42 AM, Thierry Reding wrote:
From: Thierry Reding <tred...@nvidia.com>
The counter frequency is derived from clk_m on Tegra, but that clock can
be configured by the primary bootloader to run at the same frequency as
the oscillator (38.4 MHz on Tegra210) or a divided down frequency (most
typically 19.2 MHz). Remove the hard-coded frequency and allow the timer
setup code to query the correct value at runtime.
include/configs/p2371-0000.h | 2 --
Oh, there needs to be a patch for p2371-2180.h too. Perhaps just patch
all 4 boards in one go?
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