On 17 August 2015 at 13:29, Vignesh R <vigne...@ti.com> wrote:
> ti_qspi uses memory map mode for faster read. Enabling DMA will increase
> read speed by 3x @48MHz on DRA74 EVM.
>
> Signed-off-by: Vignesh R <vigne...@ti.com>
> Reviewed-by: Jagan Teki <jt...@openedev.com>
> ---
> drivers/spi/ti_qspi.c | 23 +++++++++++++++++++++++
> 1 file changed, 23 insertions(+)
>
> diff --git a/drivers/spi/ti_qspi.c b/drivers/spi/ti_qspi.c
> index 3356c0f072e5..753d68980bd6 100644
> --- a/drivers/spi/ti_qspi.c
> +++ b/drivers/spi/ti_qspi.c
> @@ -13,6 +13,8 @@
> #include <spi.h>
> #include <asm/gpio.h>
> #include <asm/omap_gpio.h>
> +#include <asm/omap_common.h>
> +#include <asm/ti-common/ti-edma3.h>
>
> /* ti qpsi register bit masks */
> #define QSPI_TIMEOUT 2000000
> @@ -347,3 +349,24 @@ int spi_xfer(struct spi_slave *slave, unsigned int
> bitlen, const void *dout,
>
> return 0;
> }
Please add below comment here, I have asked the same on previous version patch
this will track us to the work future.
/* TODO: control from sf layer to here through dm-spi */
> +#ifdef CONFIG_TI_EDMA3
> +void spi_flash_copy_mmap(void *data, void *offset, size_t len)
> +{
> + unsigned int addr = (unsigned int) (data);
> + unsigned int edma_slot_num = 1;
> +
> + /* Invalidate the area, so no writeback into the RAM races with DMA */
> + invalidate_dcache_range(addr, addr + roundup(len, ARCH_DMA_MINALIGN));
> +
> + /* enable edma3 clocks */
> + enable_edma3_clocks();
> +
> + /* Call edma3 api to do actual DMA transfer */
> + edma3_transfer(EDMA3_BASE, edma_slot_num, data, offset, len);
> +
> + /* disable edma3 clocks */
> + disable_edma3_clocks();
> +
> + *((unsigned int *)offset) += len;
> +}
> +#endif
> --
> 2.5.0
thanks!
--
Jagan | openedev.
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