Hi Peng, On Wed, Aug 12, 2015 at 4:40 AM, Peng Fan <peng....@freescale.com> wrote: > The MIB RAM and FIFO receive start register does not exist on > i.MX6UL. Accessing these register will cause enet not work well. > > Signed-off-by: Peng Fan <peng....@freescale.com> > Signed-off-by: Fugang Duan <b38...@freescale.com> > Cc: Joe Hershberger <joe.hershber...@ni.com> > Cc: Stefano Babic <sba...@denx.de>
Looks reasonable to me. Reviewed-by: Joe Hershberger <joe.hershber...@ni.com> _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot