Hi Yangbo, > On Jun 24, 2015, at 05:13 , Yangbo Lu <yangbo...@freescale.com> wrote: > > It needs to flush D-cache before 'mmc read' so that > we can see the right data in DDR. And fix parameter > for invalidate_dcache_range() after 'mmc read'. > > Signed-off-by: Yangbo Lu <yangbo...@freescale.com> > Cc: York Sun <york...@freescale.com> > --- > drivers/mmc/fsl_esdhc.c | 21 +++++++++++++++------ > 1 file changed, 15 insertions(+), 6 deletions(-) > > diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c > index c4719e6..3ca25bd 100644 > --- a/drivers/mmc/fsl_esdhc.c > +++ b/drivers/mmc/fsl_esdhc.c > @@ -192,6 +192,17 @@ static int esdhc_setup_data(struct mmc *mmc, struct > mmc_data *data) > wml_value = data->blocksize/4; > > if (data->flags & MMC_DATA_READ) { > +#ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO > +#ifdef CONFIG_LS2085A > + /* > + * It's temporary for ls2085a so that > + * we can see right data in DDR > + */ > + flush_dcache_range((ulong)data->dest, > + (ulong)data->dest+data->blocks > + *data->blocksize); > +#endif > +#endif > if (wml_value > WML_RD_WML_MAX) > wml_value = WML_RD_WML_MAX_VAL; >
This looks like not board/soc specific, more like whether a non-coherent architecture. Please rework as a configuration option that’s suited for that kind of architectures. It looks like you’re only doing this for reads? What about writes? > @@ -278,14 +289,9 @@ static int esdhc_setup_data(struct mmc *mmc, struct > mmc_data *data) > static void check_and_invalidate_dcache_range > (struct mmc_cmd *cmd, > struct mmc_data *data) { > -#ifdef CONFIG_LS2085A > - unsigned start = 0; > -#else > - unsigned start = (unsigned)data->dest ; > -#endif > + unsigned start, end; > unsigned size = roundup(ARCH_DMA_MINALIGN, > data->blocks*data->blocksize); > - unsigned end = start+size ; > #ifdef CONFIG_LS2085A > dma_addr_t addr; > > @@ -294,7 +300,10 @@ static void check_and_invalidate_dcache_range > printf("Error found for upper 32 bits\n"); > else > start = lower_32_bits(addr); > +#else > + start = (unsigned)data->dest; > #endif > + end = start + size; > invalidate_dcache_range(start, end); > } > #endif > -- > 2.1.0.27.g96db324 > Regards — Pantelis _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot