Hi Simon,
On Sat, Aug 8, 2015 at 10:27 PM, Simon Glass <s...@chromium.org> wrote:
> We should signal to the FSP that PCI enumeration is complete. Perform this
> task in a suitable place.
>
> Signed-off-by: Simon Glass <s...@chromium.org>
> ---
>
> Changes in v2:
> - Add new patch to tidy up interrupt and FSP init
>
> arch/x86/cpu/baytrail/valleyview.c | 10 +++++++++-
> 1 file changed, 9 insertions(+), 1 deletion(-)
>
> diff --git a/arch/x86/cpu/baytrail/valleyview.c
> b/arch/x86/cpu/baytrail/valleyview.c
> index 225ea38..bbb352f 100644
> --- a/arch/x86/cpu/baytrail/valleyview.c
> +++ b/arch/x86/cpu/baytrail/valleyview.c
> @@ -7,8 +7,10 @@
> #include <common.h>
> #include <mmc.h>
> #include <pci_ids.h>
> +#include <asm/interrupt.h>
This is not needed. Please remove.
> #include <asm/irq.h>
> #include <asm/post.h>
> +#include <asm/fsp/fsp_support.h>
>
> static struct pci_device_id mmc_supported[] = {
> { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SDIO },
> @@ -40,6 +42,12 @@ int arch_cpu_init(void)
>
> int arch_misc_init(void)
> {
> - return pirq_init();
> + int ret;
> +
> + ret = pirq_init();
> + if (ret)
> + return ret;
> +
> + return fsp_init_phase_pci();
> }
> #endif
> --
Regards,
Bin
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