On 7/27/15 3:49 PM, Marek Vasut wrote:
> Replace all those ad-hoc reset functions, which were all copies
> of the same invocation of clrbits_le32() anyway, with one single
> unified function, socfpga_per_reset(), with necessary parameters.
>
> Signed-off-by: Marek Vasut <ma...@denx.de>
> ---
> arch/arm/mach-socfpga/include/mach/reset_manager.h | 7 ---
> arch/arm/mach-socfpga/misc.c | 14 ++++--
> arch/arm/mach-socfpga/reset_manager.c | 50
> ----------------------
> arch/arm/mach-socfpga/spl.c | 6 +--
> 4 files changed, 13 insertions(+), 64 deletions(-)
>
> diff --git a/arch/arm/mach-socfpga/include/mach/reset_manager.h
> b/arch/arm/mach-socfpga/include/mach/reset_manager.h
> index 56509c2..97f155d 100644
> --- a/arch/arm/mach-socfpga/include/mach/reset_manager.h
> +++ b/arch/arm/mach-socfpga/include/mach/reset_manager.h
> @@ -14,13 +14,6 @@ void socfpga_bridges_reset(int enable);
>
> void socfpga_per_reset(u32 reset, int set);
>
> -void socfpga_emac_reset(int enable);
> -void socfpga_watchdog_reset(void);
> -void socfpga_spim_enable(void);
> -void socfpga_uart0_enable(void);
> -void socfpga_sdram_enable(void);
> -void socfpga_osc1timer_enable(void);
> -
> struct socfpga_reset_manager {
> u32 status;
> u32 ctrl;
> diff --git a/arch/arm/mach-socfpga/misc.c b/arch/arm/mach-socfpga/misc.c
> index 3ddac4c..f03689c 100644
> --- a/arch/arm/mach-socfpga/misc.c
> +++ b/arch/arm/mach-socfpga/misc.c
> @@ -54,8 +54,10 @@ int cpu_eth_init(bd_t *bis)
> {
> #if CONFIG_EMAC_BASE == SOCFPGA_EMAC0_ADDRESS
> const int physhift = SYSMGR_EMACGRP_CTRL_PHYSEL0_LSB;
> + const u32 reset = SOCFPGA_RESET(EMAC0);
> #elif CONFIG_EMAC_BASE == SOCFPGA_EMAC1_ADDRESS
> const int physhift = SYSMGR_EMACGRP_CTRL_PHYSEL1_LSB;
> + const u32 reset = SOCFPGA_RESET(EMAC1);
> #else
> #error "Incorrect CONFIG_EMAC_BASE value!"
> #endif
> @@ -66,7 +68,8 @@ int cpu_eth_init(bd_t *bis)
> * Putting the EMAC controller to reset when configuring the PHY
> * interface select at System Manager
> */
> - socfpga_emac_reset(1);
> + socfpga_per_reset(SOCFPGA_RESET(EMAC0), 1);
> + socfpga_per_reset(SOCFPGA_RESET(EMAC1), 1);
Couldn't you just use the 'reset' variable here?
This my only comment on this patch, no need to resend if it's the only one.
Thanks,
Dinh
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