Synchronise the SPL behavior with the original Altera code and
toggle the Warm Reset Config I/O bit accordingly.

Signed-off-by: Marek Vasut <ma...@denx.de>
---
 arch/arm/mach-socfpga/spl.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/mach-socfpga/spl.c b/arch/arm/mach-socfpga/spl.c
index fd54ea9..8345975 100644
--- a/arch/arm/mach-socfpga/spl.c
+++ b/arch/arm/mach-socfpga/spl.c
@@ -84,8 +84,13 @@ void spl_board_init(void)
        if (scan_mgr_configure_iocsr())
                hang();
 
+       sysmgr_config_warmrstcfgio(0);
+
        /* configure the pin muxing through system manager */
+       sysmgr_config_warmrstcfgio(1);
        sysmgr_pinmux_init();
+       sysmgr_config_warmrstcfgio(0);
+
 #endif /* CONFIG_SOCFPGA_VIRTUAL_TARGET */
 
        /* de-assert reset for peripherals and bridges based on handoff */
-- 
2.1.4

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