Add a cpu1 node to the device tree and enable the MP initialization
on QEMU targets (i440fx and q35).
Signed-off-by: Bin Meng <bmeng...@gmail.com>
---
arch/x86/dts/qemu-x86_i440fx.dts | 7 +++++++
arch/x86/dts/qemu-x86_q35.dts | 7 +++++++
configs/qemu-x86_defconfig | 2 ++
doc/README.x86 | 5 +++++
4 files changed, 21 insertions(+)
diff --git a/arch/x86/dts/qemu-x86_i440fx.dts b/arch/x86/dts/qemu-x86_i440fx.dts
index c26c71b..fc74cd0 100644
--- a/arch/x86/dts/qemu-x86_i440fx.dts
+++ b/arch/x86/dts/qemu-x86_i440fx.dts
@@ -34,6 +34,13 @@
reg = <0>;
intel,apic-id = <0>;
};
+
+ cpu@1 {
+ device_type = "cpu";
+ compatible = "cpu-x86";
+ reg = <1>;
+ intel,apic-id = <1>;
+ };
};
pci {
diff --git a/arch/x86/dts/qemu-x86_q35.dts b/arch/x86/dts/qemu-x86_q35.dts
index 2e785fa..7f16971 100644
--- a/arch/x86/dts/qemu-x86_q35.dts
+++ b/arch/x86/dts/qemu-x86_q35.dts
@@ -45,6 +45,13 @@
reg = <0>;
intel,apic-id = <0>;
};
+
+ cpu@1 {
+ device_type = "cpu";
+ compatible = "cpu-x86";
+ reg = <1>;
+ intel,apic-id = <1>;
+ };
};
pci {
diff --git a/configs/qemu-x86_defconfig b/configs/qemu-x86_defconfig
index 4b18d51..e579c36 100644
--- a/configs/qemu-x86_defconfig
+++ b/configs/qemu-x86_defconfig
@@ -1,5 +1,7 @@
CONFIG_X86=y
CONFIG_DEFAULT_DEVICE_TREE="qemu-x86_i440fx"
+CONFIG_SMP=y
+CONFIG_MAX_CPUS=2
CONFIG_GENERATE_PIRQ_TABLE=y
CONFIG_GENERATE_MP_TABLE=y
CONFIG_CMD_CPU=y
diff --git a/doc/README.x86 b/doc/README.x86
index 5d71244..1cab42c 100644
--- a/doc/README.x86
+++ b/doc/README.x86
@@ -281,6 +281,11 @@ QEMU emulates a graphic card which U-Boot supports.
Removing '-nographic' will
show QEMU's VGA console window. Note this will disable QEMU's serial output.
If you want to check both consoles, use '-serial stdio'.
+Multicore is also supported by QEMU via '-smp n' where n is the number of cores
+to instantiate. Currently the default U-Boot built for QEMU supports 2 cores.
+In order to support more cores, you need add additional cpu nodes in the device
+tree and change CONFIG_MAX_CPUS accordingly.
+
CPU Microcode
-------------
Modern CPUs usually require a special bit stream called microcode [8] to be
--
1.8.2.1
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