Lokesh,

On 07/24/2015 12:20 AM, Lokesh Vutla wrote:
Hi Vitaly,
On Thursday 23 July 2015 11:31 PM, Vitaly Andrianov wrote:


On 07/22/2015 11:39 AM, Lokesh Vutla wrote:
This is just a cosmetic change that makes
the calling of pll init code looks much cleaner.

Signed-off-by: Lokesh Vutla <lokeshvu...@ti.com>
---
  arch/arm/mach-keystone/clock.c              | 12 ++++++---
  arch/arm/mach-keystone/include/mach/clock.h |  3 ++-
  board/ti/ks2_evm/board_k2e.c                | 33
+++++++++++++++--------
  board/ti/ks2_evm/board_k2hk.c               | 41
++++++++++++++++++-----------
  board/ti/ks2_evm/board_k2l.c                | 41
++++++++++++++++++-----------
  5 files changed, 84 insertions(+), 46 deletions(-)

diff --git a/arch/arm/mach-keystone/clock.c
b/arch/arm/mach-keystone/clock.c
index f60a0b8..824a6ce 100644
--- a/arch/arm/mach-keystone/clock.c
+++ b/arch/arm/mach-keystone/clock.c
@@ -191,12 +191,16 @@ void init_pll(const struct pll_init_data *data)
          configure_secondary_pll(data);
  }

-void init_plls(int num_pll, struct pll_init_data *config)
+void init_plls(void)
  {
-    int i;
+    struct pll_init_data *data;
+    int pll;

-    for (i = 0; i < num_pll; i++)
-        init_pll(&config[i]);
+    for (pll = MAIN_PLL; pll < MAX_PLL_COUNT; pll++) {
+        data = get_pll_init_data(pll);
+        if (data)
+            init_pll(data);
+    }
  }

Does the MAX_PLL_COUNT represent all PLLs on board?
It includes all except DDR. I haven't touched DDR yet.
I see.

If that is true, I think the patch is incorrect.
If you look at the history of the PLL configuration code you will find
that we had this cod in the past and changed it.
May I know why DDR pll cannot be initialized along with other PLLs?
The DDR PLL is to be configured later after reading SPD data and finding out required DDR3 speed.


The currently working code doesn't configure all PLLs an advance.
For example DDR3a PLLs is configured later, after getting information
about required DDR3 speed. Also the current version of code doesn't
configure DDR3B at all. And I don't see any reason why do we need to
change it.
So, get_pll_init_data() is defined in every board file and passes the
correct
pll data. If pll is not available, it passes NULL so pll is not
initialized.

Instead of calling init_pll for each pll separately, I made a single
function
which takes care of all this stuff.

Thanks and regards,
Lokesh



[snip]

Reviewed-by: Vitaly Andrianov <vita...@ti.com>
_______________________________________________
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

Reply via email to