Hi Jagan,
On Tue, Jun 9, 2015 at 1:58 AM, Jagan Teki <jt...@openedev.com> wrote:
> Hi Simon,
>
> On 7 June 2015 at 20:20, Simon Glass <s...@chromium.org> wrote:
>> The logic is incorrect and currently has no effect. Fix it so that we can
>> write to SPI flash, since by default it is write-protected.
>>
>> Signed-off-by: Simon Glass <s...@chromium.org>
>> ---
>>
>> drivers/spi/ich.c | 4 ++--
>> 1 file changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/spi/ich.c b/drivers/spi/ich.c
>> index a8b4d0d..784320f 100644
>> --- a/drivers/spi/ich.c
>> +++ b/drivers/spi/ich.c
>> @@ -687,10 +687,10 @@ static int ich_spi_probe(struct udevice *bus)
>> struct ich9_spi_regs *ich9_spi;
>>
>> ich9_spi = priv->base;
>> - bios_cntl = ich_readb(priv, ich9_spi->bcr);
>> + bios_cntl = readb(&ich9_spi->bcr);
>
> Couldn't understand based on the commit message, So for BIOS protection
> base shouldn't require or something?
>
This is because ich9_spi->bcr is the full address (i.e. not just
offset of the register like the others in this driver file)
> It's not looks good to me to use generic io calls (readb|writeb) with
> in the functionality
> code though we have a private calls defined on top to use generic ones.
>
Then we need make ich9_spi->bcr become its offset, so the private
calls can be used.
>> bios_cntl &= ~(1 << 5); /* clear Enable InSMM_STS (EISS) */
>> bios_cntl |= 1; /* Write Protect Disable (WPD) */
>> - ich_writeb(priv, bios_cntl, ich9_spi->bcr);
>> + writeb(bios_cntl, &ich9_spi->bcr);
>> } else {
>> pci_read_config_byte(plat->dev, 0xdc, &bios_cntl);
>> if (plat->ich_version == 9)
>> --
Regards,
Bin
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