On Sun 2015-05-10 11:15:41, Pavel Machek wrote:
Add reset for N25Q256A SPI NOR, as U-Boot SPL 2013-socfpga (only
version working on that board) sets 4-byte addressing mode.
Signed-off-by: Pavel Machek <pa...@denx.de>
---
Diff to v3: Marek insists this is Micron specific, so lets rename the
config option.
diff --git a/README b/README
index ee65fdb..69f9e5b 100644
--- a/README
+++ b/README
@@ -2775,6 +2775,10 @@ CBFS (Coreboot Filesystem) support
Timeout for waiting until spi transfer completed.
default: (CONFIG_SYS_HZ/100) /* 10 ms */
+ CONFIG_SPI_MICRON_RESET
+ Reset SPI NOR flash. Needed when preloader sets it to 4-byte
+ mode, for example.
+
- FPGA Support: CONFIG_FPGA
Enables FPGA subsystem.
diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c
index 201471c..6b39ce8 100644
--- a/drivers/mtd/spi/sf_probe.c
+++ b/drivers/mtd/spi/sf_probe.c
@@ -347,6 +348,28 @@ int spi_flash_probe_slave(struct spi_slave *spi, struct
spi_flash *flash)
}
}
+#ifdef CONFIG_SPI_MICRON_RESET
+#define CMD_RESET_ENABLE 0x66
+#define CMD_RESET_MEMORY 0x99
+ /*
+ * This is needed for the SoCFPGA booting from SPI NOR flash
+ * e.g. (MICRON), as U-Boot SPL 2013-socfpga (only version
+ * working on that board) sets 4-byte addressing mode.
+ */
+ ret = spi_flash_cmd(spi, CMD_RESET_ENABLE, NULL, 0);
+ if (ret) {
+ printf("SF: Failed issue enable reset command\n");
+ goto err_read_id;
+ }
+
+ ret = spi_flash_cmd(spi, CMD_RESET_MEMORY, NULL, 0);
+ if (ret) {
+ printf("SF: Failed issue reset command\n");
+ goto err_read_id;
+ }
+
+ printf("SF: Device software reset\n");
+#endif
#ifdef CONFIG_OF_CONTROL
if (spi_flash_decode_fdt(gd->fdt_blob, flash)) {
debug("SF: FDT decode error\n");
--
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures)
http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
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