On 28 April 2015 at 07:53, Simon Glass <s...@chromium.org> wrote:
> On 26 April 2015 at 07:54, Bin Meng <bmeng...@gmail.com> wrote:
>> On Sun, Apr 26, 2015 at 4:16 AM, Gabriel Huau <cont...@huau-gabriel.fr>
>> wrote:
>>> There are 6 banks:
>>> 4 banks for CORE: available in S0 mode
>>> 2 banks for SUS (Suspend): available in S0-S5 mode
>>>
>>> Signed-off-by: Gabriel Huau <cont...@huau-gabriel.fr>
>>> ---
>>> Changes for v2:
>>> - Fix typo in the commit message
>>>
>>> arch/x86/dts/minnowmax.dts | 42 ++++++++++++++++++++++++++++++++++++++++++
>>> 1 file changed, 42 insertions(+)
Applied to u-boot-x86, thanks!
>>>
>>> diff --git a/arch/x86/dts/minnowmax.dts b/arch/x86/dts/minnowmax.dts
>>> index 8f34369..c73e421 100644
>>> --- a/arch/x86/dts/minnowmax.dts
>>> +++ b/arch/x86/dts/minnowmax.dts
>>> @@ -21,6 +21,48 @@
>>> silent_console = <0>;
>>> };
>>>
>>> + gpioa {
>>> + compatible = "intel,ich6-gpio";
>>> + u-boot,dm-pre-reloc;
>>> + reg = <0 0x20>;
>>> + bank-name = "A";
>>> + };
>>> +
>>> + gpiob {
>>> + compatible = "intel,ich6-gpio";
>>> + u-boot,dm-pre-reloc;
>>> + reg = <0x20 0x20>;
>>> + bank-name = "B";
>>> + };
>>> +
>>> + gpioc {
>>> + compatible = "intel,ich6-gpio";
>>> + u-boot,dm-pre-reloc;
>>> + reg = <0x40 0x20>;
>>> + bank-name = "C";
>>> + };
>>> +
>>> + gpiod {
>>> + compatible = "intel,ich6-gpio";
>>> + u-boot,dm-pre-reloc;
>>> + reg = <0x60 0x20>;
>>> + bank-name = "D";
>>> + };
>>> +
>>> + gpioe {
>>> + compatible = "intel,ich6-gpio";
>>> + u-boot,dm-pre-reloc;
>>> + reg = <0x80 0x20>;
>>> + bank-name = "E";
>>> + };
>>> +
>>> + gpiof {
>>> + compatible = "intel,ich6-gpio";
>>> + u-boot,dm-pre-reloc;
>>> + reg = <0xA0 0x20>;
>>> + bank-name = "F";
>>> + };
>>> +
>>> chosen {
>>> stdout-path = "/serial";
>>> };
>>> --
>>
>> Reviewed-by: Bin Meng <bmeng...@gmail.com>
>
> Acked-by: Simon Glass <s...@chromium.org>
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