Provide access to this x86 instruction from C code.
Signed-off-by: Simon Glass <s...@chromium.org>
---
arch/x86/include/asm/cpu.h | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/x86/include/asm/cpu.h b/arch/x86/include/asm/cpu.h
index c839291..37aa6b9 100644
--- a/arch/x86/include/asm/cpu.h
+++ b/arch/x86/include/asm/cpu.h
@@ -151,6 +151,11 @@ static inline int flag_is_changeable_p(uint32_t flag)
return ((f1^f2) & flag) != 0;
}
+static inline void mfence(void)
+{
+ __asm__ __volatile__("mfence\t\n" : : : "memory");
+}
+
/**
* cpu_enable_paging_pae() - Enable PAE-paging
*
--
2.2.0.rc0.207.ga3a616c
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