On Wed, Apr 08, 2015 at 03:55:44PM +0200, Jan Kiszka wrote: > On 2015-04-08 15:43, Tom Rini wrote: > > On Wed, Apr 08, 2015 at 10:37:40AM +0200, Jan Kiszka wrote: > >> On 2015-03-19 16:02, Thierry Reding wrote: > >>> On Mon, Mar 09, 2015 at 08:00:10AM +0100, Jan Kiszka wrote: > >>>> Changes in v4: > >>>> - rebased over master > >>>> - implemented psci_get_cpu_id as weak function > >>>> - implemented psci_disable/enable_smp as weak functions > >>>> - adjusted register interface of psci_get_cpu_stack_top > >>>> > >>>> This version (+ the non-cached memory init fix) can also be found at > >>>> https://github.com/siemens/u-boot/tree/jetson-tk1-v5. > >>>> > >>>> Jan > >>>> > >>>> CC: Ian Campbell <i...@hellion.org.uk> > >>>> CC: Marc Zyngier <marc.zyng...@arm.com> > >>>> > >>>> Ian Campbell (3): > >>>> tegra124: Add more registers to struct mc_ctlr > >>>> jetson-tk1: Add PSCI configuration options and reserve secure code > >>>> tegra124: Reserve secure RAM using MC_SECURITY_CFG{0, 1}_0 > >>>> > >>>> Jan Kiszka (11): > >>>> sun7i: Remove duplicate call to psci_arch_init > >>>> ARM: Factor out common psci_get_cpu_id > >>>> ARM: Factor out reusable psci_cpu_off_common > >>>> ARM: Factor out reusable psci_cpu_entry > >>>> ARM: Factor out reusable psci_get_cpu_stack_top > >>>> ARM: Put target PC for PSCI CPU_ON on per-CPU stack > >>>> virt-dt: Allow reservation of secure region when in a RAM carveout > >>>> tegra: Make tegra_powergate_power_on public > >>>> tegra: Add ap_pm_init hook > >>>> tegra124: Add PSCI support for Tegra124 > >>>> tegra: Set CNTFRQ for secondary CPUs > >>>> > >>>> arch/arm/cpu/armv7/psci.S | 121 > >>>> ++++++++++++++++++++++++++++ > >>>> arch/arm/cpu/armv7/sunxi/psci.S | 112 > >>>> ++++--------------------- > >>>> arch/arm/cpu/armv7/virt-dt.c | 29 +++++++ > >>>> arch/arm/cpu/armv7/virt-v7.c | 5 ++ > >>>> arch/arm/include/asm/arch-tegra/ap.h | 5 ++ > >>>> arch/arm/include/asm/arch-tegra/powergate.h | 1 + > >>>> arch/arm/include/asm/arch-tegra124/flow.h | 6 ++ > >>>> arch/arm/include/asm/arch-tegra124/mc.h | 35 +++++++- > >>>> arch/arm/include/asm/armv7.h | 1 + > >>>> arch/arm/include/asm/system.h | 1 + > >>>> arch/arm/lib/bootm-fdt.c | 5 ++ > >>>> arch/arm/mach-tegra/Makefile | 4 + > >>>> arch/arm/mach-tegra/ap.c | 15 ++++ > >>>> arch/arm/mach-tegra/powergate.c | 2 +- > >>>> arch/arm/mach-tegra/psci.S | 114 > >>>> ++++++++++++++++++++++++++ > >>>> arch/arm/mach-tegra/tegra124/Kconfig | 2 + > >>>> arch/arm/mach-tegra/tegra124/Makefile | 4 + > >>>> arch/arm/mach-tegra/tegra124/ap.c | 55 +++++++++++++ > >>>> board/nvidia/common/board.c | 4 + > >>>> include/configs/jetson-tk1.h | 5 ++ > >>>> 20 files changed, 428 insertions(+), 98 deletions(-) > >>>> create mode 100644 arch/arm/mach-tegra/psci.S > >>>> create mode 100644 arch/arm/mach-tegra/tegra124/ap.c > >>> > >>> For the series: > >>> > >>> Reviewed-by: Thierry Reding <tred...@nvidia.com> > >>> Tested-by: Thierry Reding <tred...@nvidia.com> > >> > >> Thanks for all feedback - what's next? Anything missing? Should I rebase > >> (didn't check yet if that is necessary) and resend? > > > > Please rebase (it doesn't apply cleanly) and throw Reviewed/Tested-by's > > into the commit messages and then I'll apply, thanks! > > > > Base on master (there it applies fine but causes a trivial build > warning) or some other tree?
Applying: virt-dt: Allow reservation of secure region when in a RAM carveout Using index info to reconstruct a base tree... Falling back to patching base and 3-way merge... Auto-merging arch/arm/lib/bootm-fdt.c Auto-merging arch/arm/include/asm/armv7.h CONFLICT (content): Merge conflict in arch/arm/include/asm/armv7.h Auto-merging arch/arm/cpu/armv7/virt-dt.c CONFLICT (content): Merge conflict in arch/arm/cpu/armv7/virt-dt.c Recorded preimage for 'arch/arm/cpu/armv7/virt-dt.c' Recorded preimage for 'arch/arm/include/asm/armv7.h' Failed to merge in the changes. Patch failed at 0008 virt-dt: Allow reservation of secure region when in a RAM carveout Is what I saw trying to git am -3 the current series to top of tree master. -- Tom
signature.asc
Description: Digital signature
_______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
