On Thursday, March 05, 2015 at 10:53:06 PM, Simon Glass wrote: > Hi Marek,
Hi! > On 5 March 2015 at 14:51, Marek Vasut <ma...@denx.de> wrote: > > On Thursday, March 05, 2015 at 10:46:08 PM, Simon Glass wrote: > > > > Thanks. > > > >> > diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig > >> > index 0f1d740..5a415be 100644 > >> > --- a/drivers/spi/Kconfig > >> > +++ b/drivers/spi/Kconfig > >> > @@ -18,3 +18,11 @@ config DESIGNWARE_SPI > >> > > >> > Enable the Designware SPI driver. This driver can be used to > >> > access the SPI NOR flash on platforms embedding this > >> > Designware IP core. > >> > > >> > + > >> > +config CADENCE_QSPI > >> > + bool "Cadence QSPI driver" > >> > + depends on DM_SPI > >> > + help > >> > + Enable the Cadence Quad-SPI (QSPI) driver. This driver can > >> > be + used to access the SPI NOR flash on platforms embedding > >> > this + Cadence IP core. > >> > -- > >> > 2.1.3 > >> > >> Acked-by: Simon Glass <s...@chromium.org> > > > > Jagan seems to be busy with his marriage, so ... how do we handle these > > two patches ? Do you want them in for this MW or the next one (either > > way is fine by me) ? Also, I can push them through the socfpga tree, > > even though they should probably go through -spi tree. > > How about you pick them up? Uh sorry, I completely lost this email. I just replied to Jagan, so let's see how the discussion there goes. Best regards, Marek Vasut _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
