Hello Mark, On Thu, 12 Feb 2015 15:56:52 +0000, Mark Rutland <mark.rutl...@arm.com> wrote: > On Sat, Jan 31, 2015 at 03:08:54AM +0000, feng...@phytium.com.cn wrote: > > From: David Feng <feng...@phytium.com.cn> > > > > Armv7 and Armv8 allow outer cache exist, it is outside of the architecture > > defined cache hierarchy and can not be manipulated by architecture defined > > instructions. It's processor specific. > > This patch merge v7_outer_cache_* and v8 l3_cache_*. > > This commit message is a little misleading, though it probably makes > sense to have something of this sort ARMv8. Info dump below. > > Recently the ARMv8 architecture reference manual was clarified to > mention that any such system caches _must_ respect maintenance by VA, > and are affected by the architected instructions for this. The arm64 > Linux port relies on this property. > > Set/Way maintenance will not affect system caches. So if you want to > flush/empty the entire cache hierarchy, you will need to rely on a > mechanism specific to the outer cache implementation (rather than one > specific to the processor). > > Additionally, the interconnect and cache hierarchies in ARMv8 > implementations are becoming more complex, and it is more likely that > dirty lines may migrate arbitrarily between CPUs and the system caches. > Due to this you will need to ensure that CPU caches are disabled and > empty before system cache maintenance is performed (I don't know whether > your current sequences for ARMv7 ensure that).
So, does the commit message require rewriting? > Thanks, > Mark. Amicalement, -- Albert. _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
