On DRA72 EVM cpsw slave1 is muxed with VIN, therefore switch cpsw to use
slave0 using pcf driver.
DRA72 has only one cpsw phy(phy#3). Hence, set phy_id to 3 for slave0,
in case of DRA72 EVM.
Signed-off-by: Vignesh R <vigne...@ti.com>
---
board/ti/dra7xx/evm.c | 13 +++++++++++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/board/ti/dra7xx/evm.c b/board/ti/dra7xx/evm.c
index 65222419ebbd..cc391cb0a065 100644
--- a/board/ti/dra7xx/evm.c
+++ b/board/ti/dra7xx/evm.c
@@ -19,6 +19,7 @@
#include <asm/arch/mmc_host_def.h>
#include <asm/arch/sata.h>
#include <environment.h>
+#include <pcf8575.h>
#include "mux_data.h"
@@ -31,6 +32,10 @@ DECLARE_GLOBAL_DATA_PTR;
/* GPIO 7_11 */
#define GPIO_DDR_VTT_EN 203
+/* pcf chip address enet_mux_s0 */
+#define PCF_ENET_MUX_ADDR 0x21
+#define PCF_SEL_ENET_MUX_S0 4
+
const struct omap_sysinfo sysinfo = {
"Board: DRA7xx\n"
};
@@ -254,8 +259,12 @@ int board_eth_init(bd_t *bis)
ctrl_val |= 0x22;
writel(ctrl_val, (*ctrl)->control_core_control_io1);
- if (*omap_si_rev == DRA722_ES1_0)
- cpsw_data.active_slave = 1;
+ if (*omap_si_rev == DRA722_ES1_0) {
+ cpsw_data.active_slave = 0;
+ cpsw_data.slave_data[0].phy_addr = 3;
+ pcf8575_output(PCF_ENET_MUX_ADDR, PCF_SEL_ENET_MUX_S0,
+ PCF8575_OUT_LOW);
+ }
ret = cpsw_register(&cpsw_data);
if (ret < 0)
--
1.9.1
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