From: David Feng <feng...@phytium.com.cn>
CPU_RELEASE_ADDR should be defined when CONFIG_ARMV8_MULTIENTRY is used.
Signed-off-by: David Feng <feng...@phytium.com.cn>
---
board/armltd/vexpress64/vexpress64.c | 8 ++++++++
include/configs/vexpress_aemv8a.h | 9 +++++++++
2 files changed, 17 insertions(+)
diff --git a/board/armltd/vexpress64/vexpress64.c
b/board/armltd/vexpress64/vexpress64.c
index de62864..bb6b5f6 100644
--- a/board/armltd/vexpress64/vexpress64.c
+++ b/board/armltd/vexpress64/vexpress64.c
@@ -22,6 +22,14 @@ int board_init(void)
int dram_init(void)
{
+#ifdef CONFIG_ARMV8_MULTIENTRY
+ /*
+ * Clear spin table so that secondary processors
+ * observe the correct value after waken up from wfe.
+ */
+ *(unsigned long *)CPU_RELEASE_ADDR = 0;
+#endif
+
gd->ram_size = PHYS_SDRAM_1_SIZE;
return 0;
}
diff --git a/include/configs/vexpress_aemv8a.h
b/include/configs/vexpress_aemv8a.h
index 810eef1..6fa651a 100644
--- a/include/configs/vexpress_aemv8a.h
+++ b/include/configs/vexpress_aemv8a.h
@@ -54,6 +54,15 @@
/* Flat Device Tree Definitions */
#define CONFIG_OF_LIBFDT
+#ifdef CONFIG_ARMV8_MULTIENTRY
+/* SMP Spin Table Definitions */
+#ifdef CONFIG_BASE_FVP
+#define CPU_RELEASE_ADDR (CONFIG_SYS_SDRAM_BASE + 0x03f00000)
+#else
+#define CPU_RELEASE_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
+#endif
+#endif
+
/* CS register bases for the original memory map. */
#define V2M_PA_CS0 0x00000000
#define V2M_PA_CS1 0x14000000
--
1.7.9.5
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