On Mon, Mar 09, 2015 at 08:52:52PM -0300, Fabio Estevam wrote:
> Hi Tom,
>
> On Mon, Mar 9, 2015 at 8:44 PM, Tom Rini <tr...@konsulko.com> wrote:
> > On Mon, Mar 09, 2015 at 06:44:39PM -0300, Fabio Estevam wrote:
> >
> >> From: Fabio Estevam <fabio.este...@freescale.com>
> >>
> >> Since commit ad8aae82b20ac6a ("mx6sabre: Enable User Mass Storage") SPL
> >> target
> >> does not boot anymore due to the increased spl image size.
> >>
> >> Only enable USB Mass Storage for the non-SPL target.
> >>
> >> Signed-off-by: Fabio Estevam <fabio.este...@freescale.com>
> >
> > Reviewed-by: Tom Rini <tr...@konsulko.com>
> >
> > Please do a follow up commit that makes use of the existing size checks
> > to avoid this problem in the future, thanks!
>
> Yes, it would be useful. Could you please point me to the existing
> size checks function, so that I can learn about it?CONFIG_SPL_MAX_SIZE and CONFIG_SPL_MAX_BSS_SIZE or CONFIG_SPL_MAX_FOOTPRINT are what you want for i.MX6 and documented in README. I'm not quite sure of all the details on i.MX6 right now so I can't say for sure which group it falls into. On TI ARMv7 parts for example we get access to DDR by the time we need BSS, so BSS is in DDR and our limit there is semi artificial but CONFIG_SPL_MAX_SIZE (since the binary is loaded into SRAM of a limited area) is not. On some TI Davinci platforms we use CONFIG_SPL_MAX_FOOTPRINT since both BSS and the binary must be in a limited RAM area. -- Tom
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