The original aligned_buffer usage: a) Uselessly copied data into the aligned buffer even for IN transactions. b) Needlessly split the memcpy() into separate calls per chunk, rather than doing it all at once, as it did for the post-transfer copy for IN transactions. c) Always programmed the HW to transfer to/from the start of the aligned buffer, rather than the location of the start of the current chunk. This worked fine for OUT transactions since the memcpy copied the data to this location. However, for large IN transactions, it resulted in each transfer over-writing the data for the first transfer.
This patch assumes that the USB maxpacket is at least 8, so that each chunk of the overall transfer is still aligned to the HW's 8-byte alignment requirement. Signed-off-by: Stephen Warren <swar...@wwwdotorg.org> --- drivers/usb/host/dwc2.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/usb/host/dwc2.c b/drivers/usb/host/dwc2.c index 5a1c44a8fb75..5bb9df86735f 100644 --- a/drivers/usb/host/dwc2.c +++ b/drivers/usb/host/dwc2.c @@ -764,6 +764,9 @@ int chunk_msg(struct usb_device *dev, unsigned long pipe, int *pid, int in, return -EINVAL; } + if (!in) + memcpy(aligned_buffer, (char *)buffer, len); + do { /* Initialize channel */ dwc_otg_hc_init(regs, DWC2_HC_CHANNEL, devnum, ep, in, eptype, @@ -795,8 +798,7 @@ int chunk_msg(struct usb_device *dev, unsigned long pipe, int *pid, int in, (*pid << DWC2_HCTSIZ_PID_OFFSET), &hc_regs->hctsiz); - memcpy(aligned_buffer, (char *)buffer + done, len - done); - writel((uint32_t)aligned_buffer, &hc_regs->hcdma); + writel((uint32_t)&aligned_buffer[done], &hc_regs->hcdma); /* Set host channel enable after all other setup is complete. */ clrsetbits_le32(&hc_regs->hcchar, DWC2_HCCHAR_MULTICNT_MASK | -- 1.9.1 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot