On Tue, Mar 03, 2015 at 04:26:22PM -0600, Nishanth Menon wrote: > set_pl310_ctrl_reg does use the Secure Monitor Call (SMC) to setup > PL310 control register, however, that is something that is generic > enough to be used for OMAP5 generation of processors as well. The only > difference being the service being invoked for the function. > > So, convert the service to a macro and use a generic name (same as > that used in Linux for some consistency). While at that, also add a > data barrier which is necessary as per recommendation. > > While at this, switch over to smc #0 instead of handcoded assembly. > To ensure gcc compatibility, steal the strategy used by Linux kernel > for sec extension builds (NOTE: we no longer use '-march=armv5' as the > legacy comment claims).
Hi Nishanth, I applied this series with fuzz and fixed a minor conflict on master. I ran into a build issue for omap3 beagle with the sec extension scheme on the gcc version 4.7.4 (Ubuntu/Linaro 4.7.4-2ubuntu1) toolchain: arm-linux-gnueabi-gcc -Wp,-MD,arch/arm/cpu/armv7/omap3/.lowlevel_init.o.d -nostdinc -isystem /usr/lib/gcc-cross/arm-linux-gnueabi/4.7/include -Iinclude -I../include -I../arch/arm/include -include ../include/linux/kconfig.h -D__KERNEL__ -D__UBOOT__ -DCONFIG_SYS_TEXT_BASE=0x80100000 -D__ASSEMBLY__ -g -D__ARM__ -marm -mno-thumb-interwork -mabi=aapcs-linux -mword-relocations -march=armv7-a -mno-unaligned-access -ffunction-sections -fdata-sections -fno-common -ffixed-r9 -msoft-float -pipe -c -o arch/arm/cpu/armv7/omap3/lowlevel_init.o ../arch/arm/cpu/armv7/omap3/lowlevel_init.S ../arch/arm/cpu/armv7/omap-common/lowlevel_init.S: Assembler messages: ../arch/arm/cpu/armv7/omap-common/lowlevel_init.S:34: Error: selected processor does not support ARM mode `smc #0' I've worked around this for the moment by placing an explicit .arch_extension sec in lowlevel_init.S but hopefully you have some thoughts on why those flags don't seem to be picked up. I'll continue to take a look at it in the meantime. -Matt > Signed-off-by: Nishanth Menon <n...@ti.com> > --- > arch/arm/cpu/armv7/omap-common/Makefile | 3 +++ > arch/arm/cpu/armv7/omap-common/lowlevel_init.S | 17 ++++++++++------- > arch/arm/cpu/armv7/omap4/hwinit.c | 4 ++-- > arch/arm/include/asm/arch-omap4/sys_proto.h | 5 ++++- > 4 files changed, 19 insertions(+), 10 deletions(-) > > diff --git a/arch/arm/cpu/armv7/omap-common/Makefile > b/arch/arm/cpu/armv7/omap-common/Makefile > index 7695e16d36f5..b36e85d25f3f 100644 > --- a/arch/arm/cpu/armv7/omap-common/Makefile > +++ b/arch/arm/cpu/armv7/omap-common/Makefile > @@ -26,6 +26,9 @@ ifeq ($(CONFIG_SYS_DCACHE_OFF),) > obj-y += omap-cache.o > endif > > +plus_sec := $(call as-instr,.arch_extension sec,+sec) > +AFLAGS_lowlevel_init.o :=-Wa,-march=armv7-a$(plus_sec) > + > ifeq ($(CONFIG_OMAP34XX),) > obj-y += boot-common.o > obj-y += lowlevel_init.o > diff --git a/arch/arm/cpu/armv7/omap-common/lowlevel_init.S > b/arch/arm/cpu/armv7/omap-common/lowlevel_init.S > index 86c0e4217478..83426291b22d 100644 > --- a/arch/arm/cpu/armv7/omap-common/lowlevel_init.S > +++ b/arch/arm/cpu/armv7/omap-common/lowlevel_init.S > @@ -22,11 +22,14 @@ ENTRY(save_boot_params) > bx lr > ENDPROC(save_boot_params) > > -ENTRY(set_pl310_ctrl_reg) > - PUSH {r4-r11, lr} @ save registers - ROM code may pollute > +ENTRY(omap_smc1) > + PUSH {r4-r12, lr} @ save registers - ROM code may pollute > @ our registers > - LDR r12, =0x102 @ Set PL310 control register - value in R0 > - .word 0xe1600070 @ SMC #0 - hand assembled because -march=armv5 > - @ call ROM Code API to set control register > - POP {r4-r11, pc} > -ENDPROC(set_pl310_ctrl_reg) > + MOV r12, r0 @ Service > + MOV r0, r1 @ Argument > + DSB > + DMB > + SMC #0 @ Call the secure monitor for the service > + > + POP {r4-r12, pc} > +ENDPROC(omap_smc1) > diff --git a/arch/arm/cpu/armv7/omap4/hwinit.c > b/arch/arm/cpu/armv7/omap4/hwinit.c > index db16548fac49..9792761d40a0 100644 > --- a/arch/arm/cpu/armv7/omap4/hwinit.c > +++ b/arch/arm/cpu/armv7/omap4/hwinit.c > @@ -159,11 +159,11 @@ void init_omap_revision(void) > #ifndef CONFIG_SYS_L2CACHE_OFF > void v7_outer_cache_enable(void) > { > - set_pl310_ctrl_reg(1); > + omap_smc1(OMAP4_SERVICE_PL310_CONTROL_REG_SET, 1); > } > > void v7_outer_cache_disable(void) > { > - set_pl310_ctrl_reg(0); > + omap_smc1(OMAP4_SERVICE_PL310_CONTROL_REG_SET, 0); > } > #endif /* !CONFIG_SYS_L2CACHE_OFF */ > diff --git a/arch/arm/include/asm/arch-omap4/sys_proto.h > b/arch/arm/include/asm/arch-omap4/sys_proto.h > index e19975efaf50..f425e3af54f5 100644 > --- a/arch/arm/include/asm/arch-omap4/sys_proto.h > +++ b/arch/arm/include/asm/arch-omap4/sys_proto.h > @@ -37,7 +37,7 @@ void do_set_mux(u32 base, struct pad_conf_entry const > *array, int size); > void set_muxconf_regs_essential(void); > u32 wait_on_value(u32, u32, void *, u32); > void sdelay(unsigned long); > -void set_pl310_ctrl_reg(u32 val); > +void omap_smc1(u32 service, u32 val); > void setup_clocks_for_console(void); > void prcm_init(void); > void bypass_dpll(u32 const base); > @@ -57,4 +57,7 @@ int omap_vc_bypass_send_value(u8 sa, u8 reg_addr, u8 > reg_data); > u32 warm_reset(void); > void force_emif_self_refresh(void); > void setup_warmreset_time(void); > + > +#define OMAP4_SERVICE_PL310_CONTROL_REG_SET 0x102 > + > #endif > -- > 1.7.9.5 > > _______________________________________________ > U-Boot mailing list > U-Boot@lists.denx.de > http://lists.denx.de/mailman/listinfo/u-boot _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot