Hi Simon,
On Thu, Feb 26, 2015 at 8:55 AM, Simon Glass <s...@chromium.org> wrote:
> Hi Bin,
>
> On 25 February 2015 at 01:45, Bin Meng <bmeng...@gmail.com> wrote:
>> Hi Simon,
>>
>> On Thu, Feb 19, 2015 at 5:10 AM, Simon Glass <s...@chromium.org> wrote:
>>> At present we do more in this function than we should. Create a new
>>> x86_post_cpu_init() which can be called from the board file when needed
>>> (e.g. in board_early_init_f(). This allows us to use driver model for
>>> our x86_post_cpu_init() function.
>>>
>>> It is likely that some future refactoring will improve this and reduce
>>> the number of steps, using driver model's probing features.
>>>
>>> Note: this needs more discussion - e.g. I believe it breaks other x86
>>> boards. We may want to plumb this in differently (e.g. promote
>>> x86_post_cpu_init() to the board_init_f() boot sequence).
>>
>> Or maybe change the order in board_f.c so that arch_cpu_init() comes
>> after init_dm()?
>
> I feel that arch_cpu_init() should be for very early things, the
> absolute minimum to allow the machine to function and driver model to
> be set up. Clearly x86 does not conform to that now!
>
> But I think there are a few things that fit in this category so having
> the separated seems better.
OK, I would prefer we explicitly put the post_cpu_init() into
board_f.c initialization sequence. This isn't x86-specific. Any
architecture which uses DM and generic board (starting from v2015.04
release) will benefit from this.
>>
>>> Signed-off-by: Simon Glass <s...@chromium.org>
>>> ---
>>>
>>> arch/x86/cpu/ivybridge/cpu.c | 8 ++++++++
>>> arch/x86/include/asm/u-boot-x86.h | 1 +
>>> board/google/chromebook_link/link.c | 6 ++++++
>>> 3 files changed, 15 insertions(+)
>>>
>>> diff --git a/arch/x86/cpu/ivybridge/cpu.c b/arch/x86/cpu/ivybridge/cpu.c
>>> index 5fd3753..2796314 100644
>>> --- a/arch/x86/cpu/ivybridge/cpu.c
>>> +++ b/arch/x86/cpu/ivybridge/cpu.c
>>> @@ -116,6 +116,14 @@ static void set_spi_speed(void)
>>>
>>> int arch_cpu_init(void)
>>> {
>>> + post_code(POST_CPU_INIT);
>>> + timer_set_base(rdtsc());
>>> +
>>> + return x86_cpu_init_f();
>>> +}
>>> +
>>> +int x86_post_cpu_init(void)
>>> +{
>>> const void *blob = gd->fdt_blob;
>>> struct pci_controller *hose;
>>> int node;
>>> diff --git a/arch/x86/include/asm/u-boot-x86.h
>>> b/arch/x86/include/asm/u-boot-x86.h
>>> index c743efd..d5a9535 100644
>>> --- a/arch/x86/include/asm/u-boot-x86.h
>>> +++ b/arch/x86/include/asm/u-boot-x86.h
>>> @@ -38,6 +38,7 @@ void reset_cpu(ulong addr);
>>> ulong board_get_usable_ram_top(ulong total_size);
>>> void dram_init_banksize(void);
>>> int default_print_cpuinfo(void);
>>> +int x86_post_cpu_init(void);
>>>
>>> /* Set up a UART which can be used with printch(), printhex8(), etc. */
>>> int setup_early_uart(void);
>>> diff --git a/board/google/chromebook_link/link.c
>>> b/board/google/chromebook_link/link.c
>>> index 9978e92..9ebbb9f 100644
>>> --- a/board/google/chromebook_link/link.c
>>> +++ b/board/google/chromebook_link/link.c
>>> @@ -120,6 +120,12 @@ static const struct pch_gpio_map link_gpio_map = {
>>>
>>> int board_early_init_f(void)
>>> {
>>> + int ret;
>>> +
>>> + ret = x86_post_cpu_init();
>>> + if (ret)
>>> + return ret;
>>> +
>>> ich_gpio_set_gpio_map(&link_gpio_map);
>>>
>>> return 0;
>>> --
>>
Regards,
Bin
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