Split the current clkrst_init() into two functions:
- early_clkrst_init(): called from SPL
Deassert the reset signals of the memory controller and some other
basic cores.
- clkrst_init(): called from main U-boot
Deassert the reset signals that are necessary for the access to
peripherals etc.
This commit fixes a bug of Denali NAND controller initialization
for PH1-LD4. For that SoC, NAND I/O pins must be set up before
deasserting the NAND core reset signal. Otherwise, the NAND core
hangs up.
Signed-off-by: Masahiro Yamada <yamad...@jp.panasonic.com>
---
arch/arm/cpu/armv7/uniphier/board_early_init_f.c | 5 ++++
arch/arm/cpu/armv7/uniphier/ph1-ld4/Makefile | 4 +--
arch/arm/cpu/armv7/uniphier/ph1-ld4/clkrst_init.c | 22 +++++++++++-----
.../cpu/armv7/uniphier/ph1-ld4/early_clkrst_init.c | 1 +
arch/arm/cpu/armv7/uniphier/ph1-pro4/Makefile | 4 +--
arch/arm/cpu/armv7/uniphier/ph1-pro4/clkrst_init.c | 22 +++++++++++-----
.../armv7/uniphier/ph1-pro4/early_clkrst_init.c | 26 +++++++++++++++++++
arch/arm/cpu/armv7/uniphier/ph1-sld8/Makefile | 4 +--
arch/arm/cpu/armv7/uniphier/ph1-sld8/clkrst_init.c | 30 +---------------------
.../armv7/uniphier/ph1-sld8/early_clkrst_init.c | 1 +
arch/arm/cpu/armv7/uniphier/spl.c | 4 +--
11 files changed, 74 insertions(+), 49 deletions(-)
create mode 100644 arch/arm/cpu/armv7/uniphier/ph1-ld4/early_clkrst_init.c
create mode 100644 arch/arm/cpu/armv7/uniphier/ph1-pro4/early_clkrst_init.c
create mode 100644 arch/arm/cpu/armv7/uniphier/ph1-sld8/early_clkrst_init.c
diff --git a/arch/arm/cpu/armv7/uniphier/board_early_init_f.c
b/arch/arm/cpu/armv7/uniphier/board_early_init_f.c
index d25bbae..2aaebef 100644
--- a/arch/arm/cpu/armv7/uniphier/board_early_init_f.c
+++ b/arch/arm/cpu/armv7/uniphier/board_early_init_f.c
@@ -9,6 +9,7 @@
#include <asm/arch/board.h>
void pin_init(void);
+void clkrst_init(void);
int board_early_init_f(void)
{
@@ -18,5 +19,9 @@ int board_early_init_f(void)
led_write(U, 1, , );
+ clkrst_init();
+
+ led_write(U, 2, , );
+
return 0;
}
diff --git a/arch/arm/cpu/armv7/uniphier/ph1-ld4/Makefile
b/arch/arm/cpu/armv7/uniphier/ph1-ld4/Makefile
index 72f4663..927640a 100644
--- a/arch/arm/cpu/armv7/uniphier/ph1-ld4/Makefile
+++ b/arch/arm/cpu/armv7/uniphier/ph1-ld4/Makefile
@@ -4,10 +4,10 @@
ifdef CONFIG_SPL_BUILD
obj-$(CONFIG_DEBUG_LL) += lowlevel_debug.o
-obj-y += bcu_init.o sbc_init.o sg_init.o pll_init.o clkrst_init.o \
+obj-y += bcu_init.o sbc_init.o sg_init.o pll_init.o early_clkrst_init.o \
pll_spectrum.o umc_init.o ddrphy_init.o
else
-obj-$(CONFIG_BOARD_EARLY_INIT_F) += pinctrl.o
+obj-$(CONFIG_BOARD_EARLY_INIT_F) += pinctrl.o clkrst_init.o
obj-$(if $(CONFIG_OF_CONTROL),,y) += platdevice.o
endif
diff --git a/arch/arm/cpu/armv7/uniphier/ph1-ld4/clkrst_init.c
b/arch/arm/cpu/armv7/uniphier/ph1-ld4/clkrst_init.c
index 18965a9..00a21f5 100644
--- a/arch/arm/cpu/armv7/uniphier/ph1-ld4/clkrst_init.c
+++ b/arch/arm/cpu/armv7/uniphier/ph1-ld4/clkrst_init.c
@@ -1,11 +1,10 @@
/*
- * Copyright (C) 2011-2014 Panasonic Corporation
+ * Copyright (C) 2011-2015 Panasonic Corporation
* Author: Masahiro Yamada <yamad...@jp.panasonic.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
-#include <common.h>
#include <asm/io.h>
#include <asm/arch/sc-regs.h>
@@ -15,15 +14,26 @@ void clkrst_init(void)
/* deassert reset */
tmp = readl(SC_RSTCTRL);
- tmp |= SC_RSTCTRL_NRST_ETHER | SC_RSTCTRL_NRST_UMC1
- | SC_RSTCTRL_NRST_UMC0 | SC_RSTCTRL_NRST_NAND;
+#ifdef CONFIG_UNIPHIER_ETH
+ tmp |= SC_RSTCTRL_NRST_ETHER;
+#endif
+#ifdef CONFIG_NAND_DENALI
+ tmp |= SC_RSTCTRL_NRST_NAND;
+#endif
writel(tmp, SC_RSTCTRL);
readl(SC_RSTCTRL); /* dummy read */
/* privide clocks */
tmp = readl(SC_CLKCTRL);
- tmp |= SC_CLKCTRL_CLK_ETHER | SC_CLKCTRL_CLK_MIO | SC_CLKCTRL_CLK_UMC
- | SC_CLKCTRL_CLK_NAND | SC_CLKCTRL_CLK_SBC | SC_CLKCTRL_CLK_PERI;
+#ifdef CONFIG_UNIPHIER_ETH
+ tmp |= SC_CLKCTRL_CLK_ETHER;
+#endif
+#ifdef CONFIG_USB_EHCI_UNIPHIER
+ tmp |= SC_CLKCTRL_CLK_MIO;
+#endif
+#ifdef CONFIG_NAND_DENALI
+ tmp |= SC_CLKCTRL_CLK_NAND;
+#endif
writel(tmp, SC_CLKCTRL);
readl(SC_CLKCTRL); /* dummy read */
}
diff --git a/arch/arm/cpu/armv7/uniphier/ph1-ld4/early_clkrst_init.c
b/arch/arm/cpu/armv7/uniphier/ph1-ld4/early_clkrst_init.c
new file mode 100644
index 0000000..d7ef16b
--- /dev/null
+++ b/arch/arm/cpu/armv7/uniphier/ph1-ld4/early_clkrst_init.c
@@ -0,0 +1 @@
+#include "../ph1-pro4/early_clkrst_init.c"
diff --git a/arch/arm/cpu/armv7/uniphier/ph1-pro4/Makefile
b/arch/arm/cpu/armv7/uniphier/ph1-pro4/Makefile
index e330fda..0390506 100644
--- a/arch/arm/cpu/armv7/uniphier/ph1-pro4/Makefile
+++ b/arch/arm/cpu/armv7/uniphier/ph1-pro4/Makefile
@@ -4,10 +4,10 @@
ifdef CONFIG_SPL_BUILD
obj-$(CONFIG_DEBUG_LL) += lowlevel_debug.o
-obj-y += sbc_init.o sg_init.o pll_init.o clkrst_init.o \
+obj-y += sbc_init.o sg_init.o pll_init.o early_clkrst_init.o \
pll_spectrum.o umc_init.o ddrphy_init.o
else
-obj-$(CONFIG_BOARD_EARLY_INIT_F) += pinctrl.o
+obj-$(CONFIG_BOARD_EARLY_INIT_F) += pinctrl.o clkrst_init.o
obj-$(if $(CONFIG_OF_CONTROL),,y) += platdevice.o
endif
diff --git a/arch/arm/cpu/armv7/uniphier/ph1-pro4/clkrst_init.c
b/arch/arm/cpu/armv7/uniphier/ph1-pro4/clkrst_init.c
index 18965a9..00a21f5 100644
--- a/arch/arm/cpu/armv7/uniphier/ph1-pro4/clkrst_init.c
+++ b/arch/arm/cpu/armv7/uniphier/ph1-pro4/clkrst_init.c
@@ -1,11 +1,10 @@
/*
- * Copyright (C) 2011-2014 Panasonic Corporation
+ * Copyright (C) 2011-2015 Panasonic Corporation
* Author: Masahiro Yamada <yamad...@jp.panasonic.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
-#include <common.h>
#include <asm/io.h>
#include <asm/arch/sc-regs.h>
@@ -15,15 +14,26 @@ void clkrst_init(void)
/* deassert reset */
tmp = readl(SC_RSTCTRL);
- tmp |= SC_RSTCTRL_NRST_ETHER | SC_RSTCTRL_NRST_UMC1
- | SC_RSTCTRL_NRST_UMC0 | SC_RSTCTRL_NRST_NAND;
+#ifdef CONFIG_UNIPHIER_ETH
+ tmp |= SC_RSTCTRL_NRST_ETHER;
+#endif
+#ifdef CONFIG_NAND_DENALI
+ tmp |= SC_RSTCTRL_NRST_NAND;
+#endif
writel(tmp, SC_RSTCTRL);
readl(SC_RSTCTRL); /* dummy read */
/* privide clocks */
tmp = readl(SC_CLKCTRL);
- tmp |= SC_CLKCTRL_CLK_ETHER | SC_CLKCTRL_CLK_MIO | SC_CLKCTRL_CLK_UMC
- | SC_CLKCTRL_CLK_NAND | SC_CLKCTRL_CLK_SBC | SC_CLKCTRL_CLK_PERI;
+#ifdef CONFIG_UNIPHIER_ETH
+ tmp |= SC_CLKCTRL_CLK_ETHER;
+#endif
+#ifdef CONFIG_USB_EHCI_UNIPHIER
+ tmp |= SC_CLKCTRL_CLK_MIO;
+#endif
+#ifdef CONFIG_NAND_DENALI
+ tmp |= SC_CLKCTRL_CLK_NAND;
+#endif
writel(tmp, SC_CLKCTRL);
readl(SC_CLKCTRL); /* dummy read */
}
diff --git a/arch/arm/cpu/armv7/uniphier/ph1-pro4/early_clkrst_init.c
b/arch/arm/cpu/armv7/uniphier/ph1-pro4/early_clkrst_init.c
new file mode 100644
index 0000000..b5a4623
--- /dev/null
+++ b/arch/arm/cpu/armv7/uniphier/ph1-pro4/early_clkrst_init.c
@@ -0,0 +1,26 @@
+/*
+ * Copyright (C) 2011-2015 Panasonic Corporation
+ * Author: Masahiro Yamada <yamad...@jp.panasonic.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <asm/io.h>
+#include <asm/arch/sc-regs.h>
+
+void early_clkrst_init(void)
+{
+ u32 tmp;
+
+ /* deassert reset */
+ tmp = readl(SC_RSTCTRL);
+ tmp |= SC_RSTCTRL_NRST_UMC1 | SC_RSTCTRL_NRST_UMC0;
+ writel(tmp, SC_RSTCTRL);
+ readl(SC_RSTCTRL); /* dummy read */
+
+ /* privide clocks */
+ tmp = readl(SC_CLKCTRL);
+ tmp |= SC_CLKCTRL_CLK_UMC | SC_CLKCTRL_CLK_SBC | SC_CLKCTRL_CLK_PERI;
+ writel(tmp, SC_CLKCTRL);
+ readl(SC_CLKCTRL); /* dummy read */
+}
diff --git a/arch/arm/cpu/armv7/uniphier/ph1-sld8/Makefile
b/arch/arm/cpu/armv7/uniphier/ph1-sld8/Makefile
index 72f4663..927640a 100644
--- a/arch/arm/cpu/armv7/uniphier/ph1-sld8/Makefile
+++ b/arch/arm/cpu/armv7/uniphier/ph1-sld8/Makefile
@@ -4,10 +4,10 @@
ifdef CONFIG_SPL_BUILD
obj-$(CONFIG_DEBUG_LL) += lowlevel_debug.o
-obj-y += bcu_init.o sbc_init.o sg_init.o pll_init.o clkrst_init.o \
+obj-y += bcu_init.o sbc_init.o sg_init.o pll_init.o early_clkrst_init.o \
pll_spectrum.o umc_init.o ddrphy_init.o
else
-obj-$(CONFIG_BOARD_EARLY_INIT_F) += pinctrl.o
+obj-$(CONFIG_BOARD_EARLY_INIT_F) += pinctrl.o clkrst_init.o
obj-$(if $(CONFIG_OF_CONTROL),,y) += platdevice.o
endif
diff --git a/arch/arm/cpu/armv7/uniphier/ph1-sld8/clkrst_init.c
b/arch/arm/cpu/armv7/uniphier/ph1-sld8/clkrst_init.c
index 18965a9..8d3435d 100644
--- a/arch/arm/cpu/armv7/uniphier/ph1-sld8/clkrst_init.c
+++ b/arch/arm/cpu/armv7/uniphier/ph1-sld8/clkrst_init.c
@@ -1,29 +1 @@
-/*
- * Copyright (C) 2011-2014 Panasonic Corporation
- * Author: Masahiro Yamada <yamad...@jp.panasonic.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/io.h>
-#include <asm/arch/sc-regs.h>
-
-void clkrst_init(void)
-{
- u32 tmp;
-
- /* deassert reset */
- tmp = readl(SC_RSTCTRL);
- tmp |= SC_RSTCTRL_NRST_ETHER | SC_RSTCTRL_NRST_UMC1
- | SC_RSTCTRL_NRST_UMC0 | SC_RSTCTRL_NRST_NAND;
- writel(tmp, SC_RSTCTRL);
- readl(SC_RSTCTRL); /* dummy read */
-
- /* privide clocks */
- tmp = readl(SC_CLKCTRL);
- tmp |= SC_CLKCTRL_CLK_ETHER | SC_CLKCTRL_CLK_MIO | SC_CLKCTRL_CLK_UMC
- | SC_CLKCTRL_CLK_NAND | SC_CLKCTRL_CLK_SBC | SC_CLKCTRL_CLK_PERI;
- writel(tmp, SC_CLKCTRL);
- readl(SC_CLKCTRL); /* dummy read */
-}
+#include "../ph1-ld4/clkrst_init.c"
diff --git a/arch/arm/cpu/armv7/uniphier/ph1-sld8/early_clkrst_init.c
b/arch/arm/cpu/armv7/uniphier/ph1-sld8/early_clkrst_init.c
new file mode 100644
index 0000000..dd236b7
--- /dev/null
+++ b/arch/arm/cpu/armv7/uniphier/ph1-sld8/early_clkrst_init.c
@@ -0,0 +1 @@
+#include "../ph1-ld4/early_clkrst_init.c"
diff --git a/arch/arm/cpu/armv7/uniphier/spl.c
b/arch/arm/cpu/armv7/uniphier/spl.c
index 8a4eafc..ee6cce3 100644
--- a/arch/arm/cpu/armv7/uniphier/spl.c
+++ b/arch/arm/cpu/armv7/uniphier/spl.c
@@ -18,7 +18,7 @@ void sbc_init(void);
void sg_init(void);
void pll_init(void);
void pin_init(void);
-void clkrst_init(void);
+void early_clkrst_init(void);
int umc_init(void);
void enable_dpll_ssc(void);
@@ -38,7 +38,7 @@ void spl_board_init(void)
led_write(L, 0, , );
- clkrst_init();
+ early_clkrst_init();
led_write(L, 1, , );
--
1.9.1
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