Since these board functions seem to be the same for all boards which use
FSP, move them into a common file. We can adjust this later if future FSPs
need more flexibility.
This creates a generic PCI MMC device.
Signed-off-by: Simon Glass <s...@chromium.org>
---
Changes in v2:
- Move MMC code into a new pci_mmc.c file
- Remove setup_early_uart() function prototype
arch/x86/cpu/queensbay/tnc.c | 27 -------------------
arch/x86/cpu/queensbay/tnc_pci.c | 15 -----------
arch/x86/cpu/queensbay/topcliff.c | 33 +++--------------------
arch/x86/lib/fsp/Makefile | 1 +
arch/x86/lib/fsp/fsp_common.c | 55 +++++++++++++++++++++++++++++++++++++++
drivers/mmc/Makefile | 1 +
drivers/mmc/pci_mmc.c | 42 ++++++++++++++++++++++++++++++
include/mmc.h | 14 ++++++++++
8 files changed, 116 insertions(+), 72 deletions(-)
create mode 100644 arch/x86/lib/fsp/fsp_common.c
create mode 100644 drivers/mmc/pci_mmc.c
diff --git a/arch/x86/cpu/queensbay/tnc.c b/arch/x86/cpu/queensbay/tnc.c
index f9b3bfa..30ab725 100644
--- a/arch/x86/cpu/queensbay/tnc.c
+++ b/arch/x86/cpu/queensbay/tnc.c
@@ -43,30 +43,3 @@ int arch_cpu_init(void)
return 0;
}
-
-int print_cpuinfo(void)
-{
- post_code(POST_CPU_INFO);
- return default_print_cpuinfo();
-}
-
-void reset_cpu(ulong addr)
-{
- /* cold reset */
- outb(0x06, PORT_RESET);
-}
-
-void board_final_cleanup(void)
-{
- u32 status;
-
- /* call into FspNotify */
- debug("Calling into FSP (notify phase INIT_PHASE_BOOT): ");
- status = fsp_notify(NULL, INIT_PHASE_BOOT);
- if (status != FSP_SUCCESS)
- debug("fail, error code %x\n", status);
- else
- debug("OK\n");
-
- return;
-}
diff --git a/arch/x86/cpu/queensbay/tnc_pci.c b/arch/x86/cpu/queensbay/tnc_pci.c
index 9b0b725..6c291f9 100644
--- a/arch/x86/cpu/queensbay/tnc_pci.c
+++ b/arch/x86/cpu/queensbay/tnc_pci.c
@@ -44,18 +44,3 @@ void board_pci_setup_hose(struct pci_controller *hose)
hose->region_count = 4;
}
-
-int board_pci_post_scan(struct pci_controller *hose)
-{
- u32 status;
-
- /* call into FspNotify */
- debug("Calling into FSP (notify phase INIT_PHASE_PCI): ");
- status = fsp_notify(NULL, INIT_PHASE_PCI);
- if (status != FSP_SUCCESS)
- debug("fail, error code %x\n", status);
- else
- debug("OK\n");
-
- return 0;
-}
diff --git a/arch/x86/cpu/queensbay/topcliff.c
b/arch/x86/cpu/queensbay/topcliff.c
index b01422a..9faf1b9 100644
--- a/arch/x86/cpu/queensbay/topcliff.c
+++ b/arch/x86/cpu/queensbay/topcliff.c
@@ -5,43 +5,16 @@
*/
#include <common.h>
-#include <errno.h>
-#include <malloc.h>
-#include <pci.h>
+#include <mmc.h>
#include <pci_ids.h>
-#include <sdhci.h>
static struct pci_device_id mmc_supported[] = {
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TCF_SDIO_0 },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TCF_SDIO_1 },
- { }
};
int cpu_mmc_init(bd_t *bis)
{
- struct sdhci_host *mmc_host;
- pci_dev_t devbusfn;
- u32 iobase;
- int ret;
- int i;
-
- for (i = 0; i < ARRAY_SIZE(mmc_supported); i++) {
- devbusfn = pci_find_devices(mmc_supported, i);
- if (devbusfn == -1)
- return -ENODEV;
-
- mmc_host = (struct sdhci_host *)malloc(sizeof(struct
sdhci_host));
- if (!mmc_host)
- return -ENOMEM;
-
- mmc_host->name = "Topcliff SDHCI";
- pci_read_config_dword(devbusfn, PCI_BASE_ADDRESS_0, &iobase);
- mmc_host->ioaddr = (void *)iobase;
- mmc_host->quirks = 0;
- ret = add_sdhci(mmc_host, 0, 0);
- if (ret)
- return ret;
- }
-
- return 0;
+ return pci_mmc_init("Topcliff SDHCI", mmc_supported,
+ ARRAY_SIZE(mmc_supported));
}
diff --git a/arch/x86/lib/fsp/Makefile b/arch/x86/lib/fsp/Makefile
index 3a2bac0..5b12c12 100644
--- a/arch/x86/lib/fsp/Makefile
+++ b/arch/x86/lib/fsp/Makefile
@@ -5,5 +5,6 @@
#
obj-y += fsp_car.o
+obj-y += fsp_common.o
obj-y += fsp_dram.o
obj-y += fsp_support.o
diff --git a/arch/x86/lib/fsp/fsp_common.c b/arch/x86/lib/fsp/fsp_common.c
new file mode 100644
index 0000000..f668259
--- /dev/null
+++ b/arch/x86/lib/fsp/fsp_common.c
@@ -0,0 +1,55 @@
+/*
+ * Copyright (C) 2014, Bin Meng <bmeng...@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <errno.h>
+#include <asm/io.h>
+#include <asm/post.h>
+#include <asm/processor.h>
+#include <asm/fsp/fsp_support.h>
+
+int print_cpuinfo(void)
+{
+ post_code(POST_CPU_INFO);
+ return default_print_cpuinfo();
+}
+
+void reset_cpu(ulong addr)
+{
+ /* cold reset */
+ outb(0x06, PORT_RESET);
+}
+
+
+int board_pci_post_scan(struct pci_controller *hose)
+{
+ u32 status;
+
+ /* call into FspNotify */
+ debug("Calling into FSP (notify phase INIT_PHASE_PCI): ");
+ status = fsp_notify(NULL, INIT_PHASE_PCI);
+ if (status != FSP_SUCCESS)
+ debug("fail, error code %x\n", status);
+ else
+ debug("OK\n");
+
+ return 0;
+}
+
+void board_final_cleanup(void)
+{
+ u32 status;
+
+ /* call into FspNotify */
+ debug("Calling into FSP (notify phase INIT_PHASE_BOOT): ");
+ status = fsp_notify(NULL, INIT_PHASE_BOOT);
+ if (status != FSP_SUCCESS)
+ debug("fail, error code %x\n", status);
+ else
+ debug("OK\n");
+
+ return;
+}
diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile
index 4ba5878..8d42437 100644
--- a/drivers/mmc/Makefile
+++ b/drivers/mmc/Makefile
@@ -24,6 +24,7 @@ obj-$(CONFIG_MVEBU_MMC) += mvebu_mmc.o
obj-$(CONFIG_MXC_MMC) += mxcmmc.o
obj-$(CONFIG_MXS_MMC) += mxsmmc.o
obj-$(CONFIG_OMAP_HSMMC) += omap_hsmmc.o
+obj-$(CONFIG_PCI) += pci_mmc.o
obj-$(CONFIG_PXA_MMC_GENERIC) += pxa_mmc_gen.o
obj-$(CONFIG_SUPPORT_EMMC_RPMB) += rpmb.o
obj-$(CONFIG_S3C_SDI) += s3c_sdi.o
diff --git a/drivers/mmc/pci_mmc.c b/drivers/mmc/pci_mmc.c
new file mode 100644
index 0000000..dc78bcb
--- /dev/null
+++ b/drivers/mmc/pci_mmc.c
@@ -0,0 +1,42 @@
+/*
+ * Copyright (C) 2015, Google, Inc
+ * Copyright (C) 2014, Bin Meng <bmeng...@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <errno.h>
+#include <malloc.h>
+#include <sdhci.h>
+#include <asm/pci.h>
+
+int pci_mmc_init(const char *name, struct pci_device_id mmc_supported[],
+ int num_ids)
+{
+ struct sdhci_host *mmc_host;
+ pci_dev_t devbusfn;
+ u32 iobase;
+ int ret;
+ int i;
+
+ for (i = 0; i < num_ids; i++) {
+ devbusfn = pci_find_devices(mmc_supported, i);
+ if (devbusfn == -1)
+ return -ENODEV;
+
+ mmc_host = malloc(sizeof(struct sdhci_host));
+ if (!mmc_host)
+ return -ENOMEM;
+
+ mmc_host->name = (char *)name;
+ pci_read_config_dword(devbusfn, PCI_BASE_ADDRESS_0, &iobase);
+ mmc_host->ioaddr = (void *)iobase;
+ mmc_host->quirks = 0;
+ ret = add_sdhci(mmc_host, 0, 0);
+ if (ret)
+ return ret;
+ }
+
+ return 0;
+}
diff --git a/include/mmc.h b/include/mmc.h
index 09101e2..e5c3a76 100644
--- a/include/mmc.h
+++ b/include/mmc.h
@@ -438,6 +438,20 @@ int board_mmc_init(bd_t *bis);
int cpu_mmc_init(bd_t *bis);
int mmc_get_env_addr(struct mmc *mmc, int copy, u32 *env_addr);
+struct pci_device_id;
+
+/**
+ * pci_mmc_init() - set up PCI MMC devices
+ *
+ * This finds all the matching PCI IDs and sets them up as MMC devices.
+ *
+ * @name: Name to use for devices
+ * @mmc_supported: PCI IDs to search for
+ * @num_ids: Number of elements in @mmc_supported
+ */
+int pci_mmc_init(const char *name, struct pci_device_id mmc_supported[],
+ int num_ids);
+
/* Set block count limit because of 16 bit register limit on some hardware*/
#ifndef CONFIG_SYS_MMC_MAX_BLK_COUNT
#define CONFIG_SYS_MMC_MAX_BLK_COUNT 65535
--
2.2.0.rc0.207.ga3a616c
_______________________________________________
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
